Signal particle upset resistance D trigger capable of being set and reset

Abstract

The invention discloses a signal event upset resistance D trigger capable of being set and reset, and is aimed at raising signal event upset resistance capability of the signal event upset resistance D trigger capable of being set and reset. The trigger comprises a clock circuit, a reset buffer circuit, a main latch register, a secondary latch register and an output buffer circuit. The main latch register is composed of 14 PMOS tubes and 14 NMOS tubes. The secondary latch register is composed of 10 PMOS tubes and 10 NMOS tubes. Both the main latch register and the secondary latch register are subjected to duplication redundancy reinforcement, and a C2MOS circuit in the main latch register is improved, i.e., a pull-up PMOS tube and a pull-down tube which are mutually redundant in the C2MOS circuit are separated. The trigger in the invention has strong signal event upset resistance capability, is suitable for a standard cell of a signal event upset resistance reinforcement integrated circuit, and is applied to the fields of aviation, spaceflight and the like.

Description

technical field [0001] The invention relates to a master-slave D flip-flop with a settable and resettable structure, in particular to a settable and resettable D flip-flop resistant to single event upset (signal event upset). Background technique [0002] In the universe, there are a large number of high-energy particles (protons, electrons, heavy ions) and charged particles. After the integrated circuit is bombarded by these high-energy particles and charged particles, an electronic pulse will be generated in the integrated circuit, which may cause the original level of the internal node of the integrated circuit to flip. This effect is called single event upset (SEU). The higher the LET (Linear Energy Transfer) value of a single event bombarding an IC, the stronger the resulting electron pulse. Integrated circuits used in aviation and aerospace fields are threatened by single event upsets, which can make integrated circuits work unstable and even cause fatal errors. There...

AI Technical Summary

Problems solved by technology

[0008] The technical problem to be solved by the present invention is to propose a settable and resetable D flip-flop against single event reversal for the current problem that the anti-single event reversal ability of the D flip-flop that can be set and reset is not high , it can work normally under single-event bombardment with higher LET values ​​without single-event flipping

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