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Seal ring structure with polyimide layer adhesion

A polyimide layer, polyimide technology, applied in the direction of electrical components, electrical solid devices, circuits, etc., can solve problems such as peeling

Active Publication Date: 2014-12-03
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In particular, the subsequent wet etch and cure process may lead to delamination of the polyimide layer above the seal ring due to stress inducers and chemical attack (e.g., diluted HF) at the interface of the polyimide layer

Method used

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  • Seal ring structure with polyimide layer adhesion
  • Seal ring structure with polyimide layer adhesion
  • Seal ring structure with polyimide layer adhesion

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0028] It will be appreciated that the following disclosure provides a number of different embodiments or examples for implementing different features of the invention. Specific examples of components and arrangements are described below to simplify the present disclosure. Of course, this is only an example and not intended to be limiting. Furthermore, the following description of a first feature being formed on, on, or over a second feature may include embodiments where the first and second features are formed in direct contact, and may also include that additional features may be inserted between the first and second features Embodiments are formed such that the first and second features are not in direct contact. Various features may be arbitrarily drawn in different scales for simplicity and clarity.

[0029] With reference to the accompanying drawings, figure 1 A flow chart illustrating a method 100 for fabricating a semiconductor device having a seal ring structure fo...

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PUM

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Abstract

The present disclosure provides a semiconductor device, including a substrate having a seal ring region and a circuit region, a seal ring structure disposed over the seal ring region, a first passivation layer disposed over the seal ring structure, the first passivation layer having a first passivation layer aperture over the seal ring structure, and a metal pad disposed over the first passivation layer, the metal pad coupled to the seal ring structure through the first passivation layer aperture and having a metal pad aperture above the first passivation layer aperture. The device further includes a second passivation layer disposed over the metal pad, the second passivation layer having a second passivation layer aperture above the metal pad aperture, and a polyimide layer disposed over the second passivation layer, the polyimide layer filling the second passivation layer aperture to form a polyimide root at an exterior tapered edge of the polyimide layer.

Description

technical field [0001] The invention relates to a semiconductor device and a manufacturing method thereof. Background technique [0002] In the design and packaging of semiconductor integrated circuits (ICs), there are several areas of interest. Moisture needs to be prevented from entering the circuit because: (1) moisture can become trapped in the oxide and increase its dielectric constant; (2) moisture can create trapped charge centers in the gate oxide, resulting in complementary metal Threshold voltage shift in oxide semiconductor (CMOS) transistors; (3) moisture can create interface states at the Si-gate oxide interface, leading to reduced transistor lifetime through increased hot electron susceptibility; (4) moisture May cause corrosion of metal interconnects, reducing the reliability of the IC; and (5) when trapped in the Si-oxide, moisture can reduce the mechanical strength of the oxide, and due to tensile stress, the oxide may become more prone to cracking. Ionic...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/31H01L21/56
CPCH01L23/3192H01L2924/0002H01L23/10H01L2924/00
Inventor 邱志威
Owner TAIWAN SEMICON MFG CO LTD