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Mode changing circuitry

A circuit and mode technology, applied in the field of mode conversion circuit, can solve the problem of increasing the minimum operating voltage of memory cells

Active Publication Date: 2012-07-04
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, this method also increases the minimum operating voltage of the memory cell in standby mode

Method used

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Embodiment Construction

[0030] Embodiments or examples shown in the drawings are disclosed below using specific language. It should be understood, however, that these embodiments and examples are not intended to be limiting. Any alterations and modifications in the disclosed embodiments, and any further application of the principles disclosed herein are contemplated, as would normally occur to one of ordinary skill in the art. Reference numerals may be repeated throughout the embodiments, but even though the embodiments use the same reference numerals, there is no requirement that components from one embodiment be implemented in another embodiment.

[0031] Some embodiments have one or a combination of the following advantages and / or features. During standby, the minimum operating voltage (VCCmin) in power-saving mode is not compromised (leaked), and memory cell leakage current is reduced. During standby, the memory automatically transitions between power-saving mode and normal mode in response to ...

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Abstract

A circuit includes a memory cell having a ground reference node, a switch coupled to the ground reference node, and a mode changing circuit having an output coupled to the switch. The mode changing circuit is configured to change a logic state of the output between a first output logic state and a second output logic state in response to a change in an operational voltage and / or temperature, thereby set the memory cell in a first mode in which the ground reference node is at first reference level or in a second mode in which the ground reference node is at a second reference level different from the first reference level.

Description

technical field [0001] The present invention relates to mode transition circuits. Background technique [0002] P-type and N-type metal-oxide-silicon transistors (PMOS and NMOS transistors) in different wafers have different driving capabilities or different operating currents from drain to source (such as different current IDSsat). A transistor is said to be "fast" ("F") when it operates with a high ability to conduct electricity and its current IDSsat is relatively high compared to the normal current IDSsat in a normal or average transistor ("T"). Conversely, a transistor is "slow speed" ("S") when the transistor has a low conductivity and the current IDSsat of the transistor is relatively low compared to the current IDSsat in a normal transistor. When a transistor is fast, the transistor's threshold voltage, such as voltage VT, is lower, and the transistor is more easily turned on by a lower voltage applied at its gate. The symbols TT, FF, FS, SF, SS refer to a pair of...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C11/413H10N10/00
CPCG11C11/417G11C2207/2227
Inventor 王兵许国原
Owner TAIWAN SEMICON MFG CO LTD