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Circuits and methods for calibrating offset in an amplifier

A technology of offset circuit and amplifier, applied in amplifiers, improved amplifiers to improve efficiency, amplifiers with semiconductor devices/discharge tubes, etc.

Inactive Publication Date: 2016-11-30
MARVELL ASIA PTE LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, due to limitations in the internal construction of most amplifiers, the amplifier will typically generate a non-zero output when the amplifier input is 0

Method used

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  • Circuits and methods for calibrating offset in an amplifier
  • Circuits and methods for calibrating offset in an amplifier
  • Circuits and methods for calibrating offset in an amplifier

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Embodiment Construction

[0026] Described herein are techniques for reducing offset in amplifiers. In the following description, for purposes of explanation, numerous examples and specific details are set forth in order to provide a thorough understanding of some specific embodiments. The circuits and methods disclosed herein can be used in a variety of electronic systems. Further, the circuits and methods described herein may be implemented on an integrated circuit (IC). Some particular embodiments, as defined in the claims, may include some or all of these example features alone or in combination with others described below, and may further include modifications or equivalents of the features or concepts described herein.

[0027] figure 1 An amplifier circuit according to one embodiment is shown. Circuit 100 includes an amplifier 101 having an input ("IN") and an output ("OUT"). The output of the amplifier 101 is coupled to an offset detection circuit 102 . Offset detection circuit 102 detect...

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Abstract

In one embodiment, the present disclosure includes a circuit comprising: an amplifier having an input and an output; an offset detection circuit for detecting an offset of the amplifier at the output of the amplifier; and an offset generation circuit having An input coupled to the offset detection circuit and an output coupled to the input of the amplifier to generate an offset at the input of the amplifier based on the detected offset during a phase of operation of the amplifier. The generated offset cancels at least a portion of the offset of the amplifier. In one embodiment, the amplifier is a sense amplifier in a memory.

Description

[0001] Cross References to Related Applications [0002] This disclosure claims priority to US Provisional Application No. 61 / 285,484, filed December 10, 2009, the disclosure of which is incorporated herein by reference in its entirety. Background technique [0003] The present application relates to circuits and methods for offset calibration in amplifier circuits. [0004] Unless otherwise indicated herein, the approaches described in this section are not prior art to the claims in this application and are not admitted to be prior art by inclusion in this section. [0005] Amplifier circuits are the fundamental building blocks of many electronic systems. Amplifier circuits (or "amplifiers") are used to increase a specific characteristic of a signal, such as voltage, current, or power. Amplifiers usually have an offset. For example, when the amplifier input is 0, ideally the output should be 0 as well. However, due to limitations in the internal construction of most ampl...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03F1/02
CPCG11C7/06G11C29/02G11C29/026G11C29/028G11C2207/2254H03F3/45475H03F3/45968H03F2203/45048H03F2203/45101H03F2203/45212H03F2203/45586H03F2203/45588H03F2203/45681G11C7/062H03F3/45179
Inventor W·李P·李
Owner MARVELL ASIA PTE LTD