Message type internal memory accessing device and accessing method thereof

Abstract

Disclosed are a message type memory access device and an access method thereof. The message type memory access device comprises a message type command bus, a message type memory controller, a message passage and a storage module, wherein the message type command bus is used for transmitting message memory access commands generated by a CPU (central processing unit) and commands a memory system to complete corresponding operation; the message type memory controller is used for packing CPU requests into a message packet to be transmitted to the storage module, analyzing the message packet fed back by the storage module and feeding the data back to the CPU; the message passage is used as an access of transmitting of the requests and answering messages; the storage module comprises a buffer dispatcher and is used for receiving request packets of the message type memory controller and completing the corresponding requests.

Description

technical field [0001] The invention relates to the field of computer system design, in particular to a message type memory access device and an access method thereof. Background technique [0002] The memory system of a computer is one of the important factors affecting the architecture and software performance. Over the past few decades, due to the widening performance gap between processors and memory, the memory system has become a bottleneck restricting system performance. In recent years, with the transformation of processors to multi-core and many-core structures, the access bandwidth problem of memory systems has become increasingly prominent, which has restricted the further expansion of the scale of multi-core processors. [0003] For many years, the main way to increase the effective memory access bandwidth is to increase the bus frequency and the number of data channels, that is, to increase the physical bandwidth. The memory access architecture based on the sy...

AI Technical Summary

Problems solved by technology

But in a real program, the granularity of each actual data access changes

For some applications, data access is irregular and the granularity is very small, so the fixed large data granularity for each access will inevitably cause waste; while for some applications that require a large amount of continuous data reading and writing, the entire data access needs to be divided into multiple memory transactions, thereby increasing the overhead on the protocol

These actually cause a waste of memory access bandwidth

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