Semiconductor device and manufacturing method thereof
A semiconductor and device technology, applied in the field of semiconductor devices with metal silicide layers and their manufacturing, can solve problems such as retention, scratches, and exposure of semiconductor substrates
Active Publication Date: 2016-08-03
SK HYNIX INC
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Problems solved by technology
However, if the first conductive layer 19 is exposed through the CMP process, CMP scratches may be formed on the surface of the first conductive layer 19 or the slurry used in the CMP process may remain in the open air gap 23.
In addition, if the first conductive layer 19 is exposed through the etch-back process, the insulating layer 25 remaining on the sidewall of the stacked pattern MP and at the bottom of the air gap 23 may be consumed.
In addition, since the insulating layer 25 remaining in the air gap 23 is consumed by the etch-back process, the surface A of the semiconductor substrate may be exposed.
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[0022] Some exemplary embodiments of the present invention will be described in detail below with reference to the accompanying drawings. These drawings are provided so that those of ordinary skill in the art can understand the scope of embodiments of the present invention.
[0023] Figure 2A to Figure 2J is a cross-sectional view illustrating a semiconductor device and a method of manufacturing the same according to the first exemplary embodiment of the present invention. In these figures, according to one example, word line formation regions coupled with memory cells of a NAND flash memory device are shown.
[0024] see Figure 2A , a plurality of stacked patterns MP spaced apart from each other are formed over a semiconductor substrate 101 including wells (not shown) into which N-type impurities or P-type impurities have been implanted, wherein an ion implantation process is performed for controlling implementation threshold voltage. Hereinafter, the method of forming ...
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The present invention relates to a semiconductor device and a method of manufacturing the semiconductor device. The semiconductor device includes: gates formed over a semiconductor substrate, the gates being spaced apart from each other and each having a stacked structure of a tunnel insulating layer, a floating gate, a dielectric layer, a first conductive layer, and a metal silicide layer; a first insulating layer formed along sidewalls of the gates and a surface of the semiconductor substrate between the gates, and configured to have a height lower than the top of the metal silicide layer; and a second insulating layer A layer is formed along the surface of the first insulating layer and the surface of the metal silicide layer, and is configured to cover an upper portion of the space between the gates, wherein an air gap is formed between the gates.
Description
[0001] Cross References to Related Applications [0002] This application claims priority from Korean Patent Application No. 10-2011-0042520 filed May 4, 2011, the entire contents of which are incorporated herein by reference. technical field [0003] Exemplary embodiments of the present invention relate to a semiconductor device and a method of manufacturing the same, and more particularly, to a semiconductor device including a metal silicide layer formed through a silicidation process and a method of manufacturing the same. Background technique [0004] As the degree of integration of semiconductor devices increases, the width of wires and the spacing between wires within semiconductor devices become smaller. Air gaps can be formed between adjacent wires in terms of reducing interference between wires, which typically increases with spacing / width. Furthermore, in terms of improving the resistance of the wire which varies with the reduction in the width, it is possible to ...
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IPC IPC(8): H01L27/115H01L21/8247
CPCH01L21/7682H10B41/35H01L21/28052H10B41/30
Inventor 金兑京张民植金相德
Owner SK HYNIX INC