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Implementation method for quickly reading peak in GPU (graphics processing unit)

An implementation method and vertex technology, applied in the direction of processor architecture/configuration, etc., can solve problems such as small Burst, inability to fully utilize DDR bandwidth, command transmission speed not keeping up with drawing speed, etc.

Active Publication Date: 2012-12-12
CHANGSHA JINGJIA MICROELECTRONICS
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Problems solved by technology

The traditional method is to specify the primitive type, the number of components, the number of vertices, the starting address of each component, Stride and other information in the command word. Often a drawing command requires multiple (7 or more) command words to describe , the disadvantages of doing this are: (1) Due to the large number of command words, it brings great pressure to the PCI bus. The drawing speed is not high; (2) Since each component needs to send a request to DDR to fetch data according to the start address specified by the command word and Stride and other information, the Burst is relatively small, and the delay in reading DDR is relatively large. Vertex data often needs to send multiple read requests to obtain the data, which cannot make full use of the bandwidth of DDR

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  • Implementation method for quickly reading peak in GPU (graphics processing unit)

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Embodiment Construction

[0007] The present invention will be described in further detail below in conjunction with the accompanying drawings and specific embodiments.

[0008] Such as figure 1 As shown, an implementation structure for fast reading vertices in GPU. The CPU configures the initial storage address of the primitive vertex data through the PCI bus (the primitive data is stored in a fixed format, the format of the vertices of the line segment is X, Y, Z, W, R, G, B, A, and the format of the vertices of the triangle is X, Y, Z, W, R, G, B, A, S, T, 0, 0), and then the CPU sends commands to the command analysis module through the PCI bus, and the command analysis module obtains the command data by reading the asynchronous FIFO, if it is legal The command decodes each component in the command word and sends it to the primitive management module; the primitive management module sends a request to the DDR controller with a larger BurstLength through the read vertex data module according to the ...

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Abstract

The invention discloses an implementation method for quickly reading a graphics primitive peak in a GPU (graphics processing unit) design, which comprises the following steps of: storing peak data in sequence, configuring a peak start address, analyzing a drawing command, managing the graphics primitive, reading graphics primitive peak data, and clearing residual data. With the implementation method, the memory bandwidth can be fully utilized, the bus pressure is lightened, and the GPU chip peak passing rate is improved.

Description

technical field [0001] The present invention mainly relates to the field of GPU design, in particular to the fields of drawing command analysis and primitive vertex acquisition in GPU. Background technique [0002] The organization and reading of vertex data is an important issue in GPUs implemented by fixed pipelines. Its quality directly affects the efficiency of drawing. The traditional method is to specify primitive type, number of components, number of vertices, starting address of each component, Stride and other information in the command word. Often a drawing command needs multiple (7 or more) command words to describe , the disadvantages of doing this are: (1) Due to the large number of command words, it brings great pressure to the PCI bus. The drawing speed is not high; (2) Since each component needs to send a request to DDR to fetch data according to the start address specified by the command word and Stride and other information, the Burst is relatively small,...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06T1/20
Inventor 焦永
Owner CHANGSHA JINGJIA MICROELECTRONICS