Reducing simultaneous switching outputs using data bus inversion signaling

Abstract

An apparatus includes a plurality of data lines defining a data bus for communicating data. A controller is operable to communicate a plurality of data transfers over the data bus using a plurality of data time slots, wherein for at least a subset of the data time slots the controller is operable to communicate an associated data bus inversion indicator indicating that bits communicated during the associated data time slot are inverted, the data bus inversion indicators for the subset of the data transfers are grouped into a data bus inversion vector, and the controller is operable to communicate a global data bus inversion indicator indicating an inversion of the data bus inversion vector.

Description

Background technique [0001] The present invention relates generally to computing systems, and more particularly to methods and apparatus for reducing simultaneous switching outputs using data bus inversion signals. [0002] In computing systems, dynamic memory devices are used to store large amounts of data used by a processor or other computing device during its operation. Data is transferred between the computing device and the memory device on the memory bus. In such an electronic system, there are usually different power consumption requirements for driving electrical “1” and driving electrical “0”. For example, in some double data rate (DDR) synchronous dynamic random access memories (SDRAMs), driving a "0" consumes more power than driving a "1". [0003] Data bus inversion (DBI) is an I / O signaling technique whose purpose is to selectively invert the system's data bus for systems where power consumption between alternate signaled states is asymmetrical To reduce DC po...

AI Technical Summary

Problems solved by technology

Therefore, DBI can introduce new SSO issues and reduce overall SSO benefits

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