Method for aligning semiconductor materials

Abstract

The present invention relates to a method which enables the positions of semiconductor materials to be accurately aligned so as to accurately transfer the semiconductor materials to processing positions in an apparatus for manufacturing a semiconductor package. According to the present invention, a wafer-processing apparatus, such as a singulation apparatus or the like that cuts a wafer-type material, in which a plurality of semiconductor packages is arranged into a lattice, into individual semiconductor package units, achieves a novel alignment system in that the alignment relationship between the center of a dowel hole and the center of a semiconductor package is photographed by means of a vision camera, and the positions of the materials in the X-Y-è directions are accurately aligned so as to accurately transfer the materials to the processing positions. Therefore, the wafer-processing apparatus can be actively used in a novel aligning method such as wafer-level packaging or the like. Particularly, the present invention relates to a method for aligning semiconductor materials, which can avoid the influence of errors caused by the vibration of equipment, etc., and ensure accurate measurement values in order to accurately align the materials.

Description

[0001] Cross References to Related Applications [0002] This application is claimed under 35 U.S.C. §119(a) to Korean Patent Application No. 10-2010-0041973 filed May 4, 2010 and Korean Patent Application No. 10-2010-0048752 filed May 25, 2010 interests, the entire contents of which are hereby incorporated by reference. technical field [0003] The present invention relates to a method of aligning the position of a semiconductor wafer, and more particularly, to a method of precisely aligning the position of a semiconductor wafer for precise transfer of the semiconductor wafer to a processing location in an apparatus for manufacturing semiconductor packages. Background technique [0004] Generally, a semiconductor package is manufactured in such a manner that a plurality of semiconductor packages on which transistors and capacitors are integrated at a high density are attached to a rectangular plate-shaped lead frame, and the plurality of semiconductor packages are electrica...

AI Technical Summary

Problems solved by technology

[0007] However, when the wafer to be subjected to the dicing process has a circular shape, such as wafer-level packaging, it is difficult to precisely coincide the dicing line of the wafer with the blade receiving groove on the chuck table, so that the wafer is transferred to the card during the singulation process. The wafer may not be placed precisely on the chuck table when the position of the dicing process on the chuck table

[0008] Thus, if the wafer is not placed precisely on the chuck table for dicing, the cutting line of the wafer does not exactly coincide with the blade receiving slot on the chuck table, and the tip of the dicing blade may hit the edge of the chuck table during the dicing process. Top surface, damage to expensive cutting blades or chuck tables

[0009] In addition, the wafer will not be diced into a desired shape along the dicing lines forming the matrix shape, and the semiconductor package is judged to be defective, which increases manufacturing cost and significantly lowers productivity

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