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Chip-level testing device

A test device and chip-level technology, applied in the direction of electronic circuit testing, testing dielectric strength, single semiconductor device testing, etc., can solve the problems of low cost, low efficiency, high cost of chip testing, etc.

Inactive Publication Date: 2013-04-24
深圳深爱半导体股份有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] Based on this, it is necessary to provide a low-cost and high-efficiency chip-level testing device for the problem of high cost and low efficiency of testing chips using the Kelvin test method

Method used

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Examples

Experimental program
Comparison scheme
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Embodiment Construction

[0023] A chip-level test device, by setting a breakdown module, the test pins that are oxidized due to frequent use are broken down, and the test module is in good contact with the test position of the chip without changing the hardware of the device, avoiding the conventional Kelvin The test requires the use of four test needles, which is costly. When the bonding area of ​​the pins of the chip is small, the Kelvin test requires the use of high-cost and high-maintenance probe cards, and the chip-level test device only uses common test needle holders. More flexible and low cost.

[0024] The present invention will be described in further detail below in conjunction with the accompanying drawings and embodiments.

[0025] figure 1 Shown is a schematic structural diagram of a chip-level testing device according to an embodiment of the present invention. A chip-level test device is used for testing the electrical characteristic parameters of the chip 10 , including a test needle...

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PUM

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Abstract

The invention discloses a chip-level testing device which comprises a testing needle, a testing module and a breakdown module. The breakdown module provides breakdown current to break down a contact resistance of the testing needle and a chip to ensure that the testing module well contacts the chip. The testing module conducts chip-level tests on the chip after the breakdown module breaks down the contact resistance of the testing needle and the chip. Because the breakdown module is arranged on the chip-level testing device to break down the contact resistance when the testing needle contacts the testing position of the chip, wrong testing caused by bad contact of the testing needle and the chip because of oxidation of the testing needle is avoided; and the purpose of reducing the contact resistance on the condition that hardware conditions of the chip-level testing device are not changed is achieved, and therefore use of a probe card is avoided, and cost is reduced.

Description

technical field [0001] The invention relates to the field of chip testing, in particular to a chip-level testing device. Background technique [0002] With the development of electronic technology, the application of electronic chips is becoming more and more extensive. Before using the chip, it is necessary to test the parameters of the chip, so that the failed chip can be removed before packaging, and the packaging cost can be reduced. When using the test to test the chip, the frequent use of the test needle will cause the needle tip to oxidize. Oxidation of the needle tip will affect the contact between the test needle and the chip bonding area, resulting in poor contact and high contact resistance, which will affect the accuracy of the chip test parameters. . [0003] The general test uses the Kelvin test method to solve the problem of contact resistance from the hardware point of view. Four test needles are required for testing chip-level high-power transistors. Take...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01R31/28G01R31/26G01R31/12
Inventor 王云锋
Owner 深圳深爱半导体股份有限公司