Method for manufacturing semiconductor structure including connector, related structure and device

Abstract

PURPOSE: A manufacturing method of a semiconductor structure including interposers with conductive vias, and related structures and devices improve performance by including the conductive vias having a relatively low aspect ratio. CONSTITUTION: Conductive vias (110) through a material layer (104) on a recoverable substrate are formed. A carrier substrate is bonded to the upper part of the material layer opposite to the recoverable substrate. A detachable interface is formed between the recoverable substrate and the material layer. The recoverable substrate is separated from the material layer to recover the recoverable substrate. Electrical contacts (160) that communicate electrically with the conductive vias are formed on the upper part of the material layer opposite to the carrier substrate.

Description

[0001] Cross References to Related Applications [0002] The subject matter of this application relates to an invention filed on March 31, 2011 entitled "Method for forming a bonded semiconductor structure comprising two or more processed semiconductor structures carried by a common substrate, and a semiconductor structure formed by said method (Methods of Forming Bonded Semiconductor Structures Including Twoor More Processed Semiconductor Structures Carried by a Common Substrate, and Semiconductor Structures Formed by Such Methods)" is the subject of U.S. Patent Application No. 13 / 077,365. technical field [0003] The present application relates to methods of forming and using interposers in the manufacture of semiconductor devices, and structures and devices manufactured using the methods. Background technique [0004] In the manufacture of semiconductor devices including integrated circuits such as electronic signal processors, memory devices, and photosensitive devices (...

AI Technical Summary

Problems solved by technology

Such voids would render conductive vias unusable

Also, larger conductive vias require the use of more metal, which increases cost and increases the duration of the metal deposition process

Larger conductive vias also take up more area on the connector, limiting the number of conductive vias that can be formed in a given area of ​​the connector, which limits the size of any semiconductor device with such a connector. total operating bandwidth of

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