A kind of signal output method and device based on i/o interface

Abstract

The embodiment of the invention discloses a signal output method and device based on an I / O interface, which are used to improve the stability of chip products. In the embodiment of the present invention, the I / O interface is set in the first chip, the first chip is provided with a Core power domain, and the first chip communicates with the second chip. The method includes: judging whether the output voltage of the Core power domain is lower than a preset The threshold voltage of the first chip; if the voltage output by the Core power domain is lower than the threshold voltage, a first level signal is generated according to the control function of the first chip to the second chip, and the first level signal is used to make the second chip in the After receiving the first level signal, it is in the ignore state; the first level signal is sent to the second chip through the I / O interface, wherein, when the second chip enters the ignore state, the second chip ignores the The control signal and data signal sent by the first chip.

Description

technical field [0001] The invention relates to the field of electronic technology, in particular to a signal output method and device based on an I / O interface. Background technique [0002] The two chips usually use an input / output (I / O, Input / Output) interface for communication. In an actual communication system, the sending chip and the receiving chip cannot be completely synchronized. The metastable state of the sending chip (metastable state refers to the unstable state that occurs when the I / O power supply is powered on or off) will cause errors in writing data or program operation errors in the receiving chip. Such as figure 1 As shown, if the sending chip only has I / O in the output direction, in order to avoid the wrong influence caused by the metastable state of the sending chip on the receiving chip, the I / O interface of the input direction in the receiving chip will generally have a built-in weak pull-up resistor. Or a weak pull-down resistor (the resistance v...

AI Technical Summary

Problems solved by technology

Taking the sending chip as an example, the control signals of the I / O interface are generated by the Core power domain. If the power supply of the receiving chip and the I / O power supply of the sending chip are stable, but the Core power supply of the sending chip is powered on or off. The I / O interface will collect some abnormal data from the Core power domain and send it to the receiving chip, resulting in some misoperations on the receiving chip. This misoperation will affect the key control signals of the receiving chip, such as chip select (CS, Chip Select ) signal / low-level active chip select (CSn, Chip Select with low level) signal, the abnormal data collected by the receiving chip when its own Core power supply is powered on or off will also cause the same problem to the sending chip

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