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Semiconductor Substrate Processing System

A technology for processing systems and substrates, used in semiconductor/solid-state device manufacturing, coating, gaseous chemical plating, etc., can solve problems such as low chamber durability, small substrates, low purity or quality of III-V films, etc.

Active Publication Date: 2018-05-22
APPLIED MATERIALS INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Unfortunately, current processing equipment and methods fail to produce materials with suitable material qualities such as low defect density, compositional control, high purity, morphology, in-wafer uniformity, and run to run Reproducibility) III-V membranes
Additionally, due to compatibility issues, current processing equipment for III-V materials is not integrated with other CMOS device processing equipment, such as processing chambers, for example in a cluster tool, to facilitate high-k ( high-k) dielectric pre-cleaning, annealing and / or deposition
These compatibility issues can be, for example, small substrate size, low III-V film purity or quality, and / or low chamber durability

Method used

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  • Semiconductor Substrate Processing System
  • Semiconductor Substrate Processing System
  • Semiconductor Substrate Processing System

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Embodiment Construction

[0016] Methods and apparatus for depositing materials on substrates are provided herein. In some embodiments, the inventive method and apparatus can be advantageously used to deposit III-V materials on a substrate. The inventive method and apparatus advantageously provide for the deposition of III-V films suitable for complementary metal oxide semiconductor (CMOS) applications. In some embodiments, the inventive device may advantageously enable III -Incorporation of Group V materials into mainstream silicon-based CMOS device fabrication.

[0017] figure 1 is a schematic top view of an exemplary multi-chamber processing system 100 according to some embodiments of the invention. Examples of suitable multi-chamber processing systems include processing system, processing system and Processing systems, which are commercially available from Applied Materials, Inc. Another similar multi-chamber processing system that may be adapted to benefit from the present invention is d...

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Abstract

The present invention provides apparatus for processing substrates. In some embodiments, the processing system may include a first transfer chamber and a first processing chamber coupled to the transfer chamber, the processing chamber further comprising: a substrate support for supporting a substrate located in the processing chamber a processing surface of a substrate within the chamber; an injector disposed on a first side of the substrate support and having a first flow path providing a first processing gas and a second processing gas providing a second processing gas independent of the first processing gas two flow paths, wherein an injector provides the first processing gas and the second processing gas throughout the processing surface of the substrate; a showerhead, the showerhead is positioned above the substrate support to provide the first processing gas to the processing surface; and An exhaust port is positioned to the second side of the substrate support opposite the injector to exhaust the first process gas and the second process gas from the processing chamber.

Description

technical field [0001] Embodiments of the invention generally relate to a substrate processing system. Background technique [0002] As the critical dimensions of complementary metal-oxide-semiconductor (CMOS) devices continue to shrink, new materials need to be incorporated into CMOS architectures to improve energy efficiency and / or increase speed. One such group of materials are III-V materials, which may be used, for example, in channels of transistor devices. Unfortunately, current processing equipment and methods fail to produce materials with suitable material qualities such as low defect density, compositional control, high purity, morphology, in-wafer uniformity, and run to run Reproducibility) III-V membranes. Additionally, due to compatibility issues, current processing equipment for III-V materials is not integrated with other CMOS device processing equipment, such as processing chambers, for example in a cluster tool, to facilitate high-k ( high-k) dielectric ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/205
CPCC23C16/4412C23C16/45565C23C16/45574C23C16/54H01L21/67115H01L21/67184H01L21/67201H01L21/67207C23C16/301C23C16/06
Inventor 埃罗尔·安东尼奥·C·桑切斯戴维·K·卡尔森萨瑟施·库珀奥
Owner APPLIED MATERIALS INC