Phase detection method for clock recovery and apparatuses
一种时钟恢复、相位检测器的技术,应用在光通信领域,能够解决相位检测方法失效等问题
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Embodiment 1
[0066] An embodiment of the present invention provides a phase detector, image 3 is the composition diagram of the phase detector, please refer to image 3 , the phase detector consists of:
[0067] A calculation unit 31, which calculates the phase difference according to the product of the received power at different times, so as to use the phase difference to perform clock recovery.
[0068] In this embodiment, the received power is the received power obtained when the input signal is sampled at a predetermined sampling rate. The predetermined sampling rate is twice the symbol rate.
[0069] In one embodiment, the calculation unit 31 can calculate the phase difference according to the following formula:
[0070] s 2 n = Σ i = 0 2 m - 1 ...
Embodiment 2
[0087] The embodiment of the invention also provides a clock recovery device. Figure 4 is a schematic diagram of the composition of the clock recovery device, please refer to Figure 4 , the clock recovery device includes: a voltage-controlled oscillator 41 and a phase detector 42, wherein:
[0088] The voltage-controlled oscillator 41 is used to drive the analog-to-digital converter for sampling. It can be realized by a traditional voltage-controlled oscillator, the content of which is incorporated herein, and will not be repeated here.
[0089] The phase detector 42 is connected with the voltage-controlled oscillator 41 for detecting phase difference. It can be realized by the phase detector described in Embodiment 1, the content of which is incorporated here, and will not be repeated here.
[0090] Through the clock recovery device of this embodiment, the phase difference detected by the phase detector of Embodiment 1 is used to control the sampling phase of the voltage...
Embodiment 3
[0092] The embodiment of the present invention also provides a digital coherent receiver, and the digital coherent receiver is single-polarized. Figure 6 is a schematic diagram of the composition of the digital coherent receiver, please refer to Figure 5 , the digital coherent receiver includes: a coherent detector 51, an analog-to-digital converter 52, a dispersion compensator 53, a data restorer 54, and a clock recovery device 65, wherein:
[0093] The coherent detector 51 is used to convert the received optical signal into an electrical signal. For example, the coherent detector 51 may include a local oscillator laser, an optical mixer and a photodetector, which converts the received optical signal into an electrical signal by using the local oscillator laser, the optical mixer and the photodetector. In this embodiment, the coherent detector 51 can be implemented by a traditional coherent detector, the content of which is incorporated herein, and will not be repeated her...
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