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Power-down memory method of power-down memory circuit and power-down memory circuit

A power-down memory circuit and power-down memory technology, applied in the circuit field, can solve problems such as short maintenance time, data loss, and inability to save working parameters for a long time, and achieve the effect of prolonging the discharge time and extending the time

Active Publication Date: 2017-06-30
MIDEA GRP CO LTD +1
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0002] Home appliances are divided into two types: those with batteries and those without batteries. The main function of batteries is to provide energy for the chip to memorize the working parameters when the home appliances are powered off. The home appliances without batteries cannot save the working parameters for a long time. The operation of the chip can only be maintained by the residual power of the capacitor, but its maintenance time is very short, and there is a risk of random data loss

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  • Power-down memory method of power-down memory circuit and power-down memory circuit
  • Power-down memory method of power-down memory circuit and power-down memory circuit
  • Power-down memory method of power-down memory circuit and power-down memory circuit

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Embodiment Construction

[0019] It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0020] The present invention provides a power-off memory method for a power-off memory circuit, please refer to figure 1 , which discloses an embodiment of the power-down memory method of the power-down memory circuit of the present invention, in this embodiment, the power-down memory method of the power-down memory circuit includes:

[0021] S1, set the power supply capacitor, which is used to supply power to the IC chip when the power-off memory circuit is powered off;

[0022] S2, a voltage detection capacitor is set, which is used for voltage detection by the IC chip when the power-off memory circuit is powered off;

[0023] S3. When the power-off memory circuit is powered off, the IC chip detects the voltage of the voltage detection capacitor and compares it with the set low power consumption voltage. When the I...

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Abstract

The invention discloses a power-down memory method for a power-down memory circuit, comprising: setting a power supply capacitor and a voltage detection capacitor; Switch to normal mode. Because the method of the present invention supplies power to the IC chip through the power supply capacitor, and makes the IC chip supply power to the voltage detection capacitor and detect the voltage of the voltage detection capacitor to switch between the low power consumption mode and the normal mode to prolong the discharge time of the power supply capacitor, thereby enabling When the power-off memory circuit is powered off, the time for the IC chip to save the working parameters is extended.

Description

technical field [0001] The invention relates to the field of circuit technology, in particular to a power-down memory method for a power-down memory circuit and the power-down memory circuit. Background technique [0002] Home appliances are divided into two types: those with batteries and those without batteries. The main function of batteries is to provide energy for the chip to memorize the working parameters when the home appliances are powered off. The home appliances without batteries cannot save the working parameters for a long time. The operation of the chip can only be maintained by the residual power of the capacitor, but its maintenance time is very short, and there is a risk of random data loss. Contents of the invention [0003] The object of the present invention is to provide a power-off memory method for a power-off memory circuit and a power-off memory circuit, aiming at prolonging the time for the power-off memory circuit to save working parameters when ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03K17/22
Inventor 房振王强
Owner MIDEA GRP CO LTD
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