Finfet and its manufacturing method

Abstract

A FinFET and a method for manufacturing the same are provided. The method includes: patterning a semiconductor substrate to form a ridge; performing ion implantation such that a doped punch-through-stopper layer is formed in the ridge and a semiconductor fin is formed by a portion of the semiconductor substrate disposed above the doped punch-through-stopper layer; forming a gate stack intersecting the semiconductor fin, the gate stack comprising a gate conductor and a gate dielectric isolating the gate conductor from the semiconductor fin; forming a gate spacer surrounding the gate conductor; and forming source and drain regions in portions of the semiconductor fin at opposite sides of the gate stack.

Description

technical field [0001] The present invention relates to semiconductor technology, and more particularly, to FinFETs and methods of making the same. Background technique [0002] As the size of semiconductor devices becomes smaller and smaller, the short channel effect becomes more and more obvious. To suppress short-channel effects, FinFETs formed on SOI wafers or bulk semiconductor substrates have been proposed. A FinFET includes a channel region formed in the middle of a fin (fin) of semiconductor material, and source / drain regions formed at both ends of the fin. The gate electrode surrounds the channel region on both sides of the channel region (ie a double gate structure), thereby forming an inversion layer on each side of the channel. Since the entire channel region can be controlled by the gate, it can play a role in suppressing the short channel effect. [0003] In mass production, FinFETs fabricated using bulk semiconductor substrates are more cost-effective than ...

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Problems solved by technology

[0005] However, the concentration distribution of doped regions makes it difficult to form sharp boundaries

The depth position and thickness of the doped punch-through prevention layer provided by the doped region are difficult to clearly define

Furthermore, the thickness of the semiconductor fin located above the doped punch-through preventing layer is also difficult to clearly define

The transition region between the semiconductor fin and the doped punch-through stop layer can become a potential leakage current path and cause undesired random variation in the threshold voltage of the FinFET

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