Multilayer obstacle-avoiding Steiner minimal tree construction method for very large scale integration

A technology of large-scale integrated circuits and construction methods, which can be applied in gene models, electrical digital data processing, special data processing applications, etc., and can solve problems affecting the quality of wiring solutions, etc.

Active Publication Date: 2014-07-02
上海立芯软件科技有限公司
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Problems solved by technology

However, this method converts the multi-layer Steiner minimum tree problem into multiple single-layer Steiner minimum tree problems, and f

Method used

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  • Multilayer obstacle-avoiding Steiner minimal tree construction method for very large scale integration
  • Multilayer obstacle-avoiding Steiner minimal tree construction method for very large scale integration
  • Multilayer obstacle-avoiding Steiner minimal tree construction method for very large scale integration

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Embodiment Construction

[0047] VLSI multi-layer detour Steiner minimum tree construction method of the present invention, such as figure 1 shown, including the following steps:

[0048] Step 1: Read the benchmark test circuit network data and sort them in ascending order according to the number of layers and coordinate size. Before entering the iterative process, the method pre-calculates and stores the routing status bits of all possible routing edges, and directly queries the required routing status bit values ​​during iteration, so as to reduce the calculation times of the routing status bits.

[0049] Step 2: Initialize the parameters such as population size and number of iterations, encode the optimization parameters and randomly generate the initial population.

[0050] This method adopts the edge point pair encoding method suitable for X structure and multilayer wiring to encode the X structure multilayer Steiner tree: use the edge set of the wiring tree to encode the corresponding Steiner t...

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Abstract

The invention relates to a multilayer obstacle-avoiding Steiner minimal tree construction method for a very large scale integration. The method includes the following steps: 1, reading benchmark test circuit network data; 2, initializing parameters such as population sizes and iterations, and generating initial populations randomly; 3, updating positions and speeds of particles according to a particle updating formula; 4, calculating fitness values of new particles according to a punishment mechanism based fitness calculation function, judging whether or not the fitness values of the new particles are smaller than historical optimal values of the particles, and if yes, updating the new particles as historical optimal particles of the particles; 5, judging whether or not the fitness values of the new particles are smaller than global optimal values of the populations, and if yes, updating the new particles as global optimal particles of the populations; 6, judging whether iteration end conditions are met or not, if yes, outputting final wiring trees, and if not, returning to the step 3 for next iteration. By the method, total wiring cost is reduced, and quality of the wiring trees is improved.

Description

technical field [0001] The invention belongs to the technical field of computer-aided design of integrated circuits, and in particular relates to a Steiner minimum tree construction method for ultra-large-scale integrated circuits with multi-layer obstacle bypassing under X structure and particle swarm optimization. Background technique [0002] The multilayer obstacle-avoiding X-architecture Steiner minimal tree (ML-OAXSMT) problem in very large scale integration (VLSI) design is a series of wiring leads on a given wiring layer. A set of pins and obstacles, connect the pins on each wiring layer through the X structure edge and connect the wiring layers with vias, under the constraint that the wiring edges and vias do not pass through obstacles, construct a Steiner with the minimum total wiring cost Tree. The ML-OAXSMT problem is a Steiner minimum tree model considering three conditions of obstacles, X structure, and multiple layers. [0003] As the basic model of ML-OAXSM...

Claims

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Application Information

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IPC IPC(8): G06F17/50G06N3/12
Inventor 郭文忠陈国龙刘耿耿
Owner 上海立芯软件科技有限公司
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