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Self-adjusting multiply accumulation device for lossless audio decoding algorithm

A technology of audio decoding and multiplying and accumulating, which is applied in the calculation using number system representation, calculation using non-contact manufacturing equipment, etc.

Inactive Publication Date: 2014-08-13
ZHEJIANG UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, existing multiply-accumulators are often difficult to meet the above two requirements at the same time. In some designs, the delay of the multiply-accumulator is sacrificed in order to achieve high performance; in some designs, the performance of the multiply-accumulator is sacrificed in order to reduce the delay.

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  • Self-adjusting multiply accumulation device for lossless audio decoding algorithm
  • Self-adjusting multiply accumulation device for lossless audio decoding algorithm
  • Self-adjusting multiply accumulation device for lossless audio decoding algorithm

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Embodiment Construction

[0029] In conjunction with the accompanying drawings, the present invention will be described in detail below.

[0030] Such as figure 1 As shown, the example of the present invention divides the multiply-accumulate device into four functional units that are executed in sequence, the operand preprocessing unit 1, the multiplier unit 2, the multiplier result processing unit 3 and the multiply-accumulator output unit 4, each functional unit It can complete the different functions belonging to the multiply-accumulate device. Each functional unit is described in detail below.

[0031] The operand preprocessing unit 1 includes two parts: an operand judgment module and an operand decomposition module. figure 2 Shown is the logic diagram of the operand judgment module, which can judge the input multiplicand and the number of digits of the multiplier, and obtain the multiplication and accumulation mode selection signal F_mul according to the judgment result, and the multiplication ...

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Abstract

The invention discloses a self-adjusting multiply accumulation device for a lossless audio decoding algorithm. The self-adjusting multiply accumulation device is characterized by comprising an operand preprocessing unit (1), a multiplier unit (2), a multiplier result processing unit (3) and a multiply accumulator output unit (4), wherein the operand preprocessing unit (1) is used for judging and decomposing an operand; the multiplier unit (2) is used for carrying out multiplication on the operand input by the operand preprocessing unit (1); the multiplier result processing unit (3) is used for carrying out splicing and symbol extension operation on an output result of the multiplier result processing unit (3); the multiply accumulator output unit (4) is used for carrying out additive operation on the input of the multiplier result processing unit (3) so as to obtain a final multiply accumulation result. The self-adjusting multiply accumulation device is used for achieving multiply accumulation operation in different modes and is capable of achieving multiply accumulation operation under two different modes of 32*32 and 16*16 according to the data features of the multiply accumulation operand.

Description

technical field [0001] The invention relates to a self-adjusting multiply-accumulate device oriented to a lossless audio decoding algorithm, which is used for realizing multi-mode multiply-accumulate functions. Background technique [0002] The lossless audio compression algorithm has the characteristics of being able to preserve 100% of the original audio signal without any data loss, which means that the sound quality of the lossless audio format is at the same level as that of the original CD, so it is more and more widely used. By analyzing the application characteristics of the lossless audio APE decoding algorithm, we found that the algorithm contains many multiplication and multiply-accumulate operations, so the processing capability of the multiply-accumulate operation has a greater impact on the performance of the processor decoding APE program. Multiply and accumulate operations usually have multiple modes. According to whether the multiplier and multiplicand are s...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F7/52
Inventor 刘鹏翁波拉徐国柱张奇董东升
Owner ZHEJIANG UNIV