Sample importance resample particle filter hardware implementation method based on FPGA

A particle filter and hardware implementation technology, which is applied in nonlinear system filtering and electronic fields, can solve the problem of less hardware implementation, and achieve the effect of speeding up the execution time and reducing the complexity of the algorithm

Active Publication Date: 2014-08-27
HUAWEI TEHCHNOLOGIES CO LTD
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Problems solved by technology

At present, most of the particle filter literature is about its theoretical research and algorithm simulation, but very little about its hardware implementation

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  • Sample importance resample particle filter hardware implementation method based on FPGA
  • Sample importance resample particle filter hardware implementation method based on FPGA
  • Sample importance resample particle filter hardware implementation method based on FPGA

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Embodiment Construction

[0026] The particle filter algorithm has the following two unique execution characteristics: (1) It can be expressed as a data flow graph, and nodes (or modules) can be executed concurrently. Although the complexity of each module is different, the data flow graph can clearly represent the data dependencies between modules; (2) Each module in the data flow graph processes a set of data in each cycle.

[0027] In order to apply hardware to implement particle filtering, the present invention adopts a module-level pipeline design method, and divides particle filtering into a particle generation module, a particle update module, a resampling module, and an output generation module. Each module is executed in parallel, which can significantly improve the operating efficiency of the algorithm. At the same time, in order to make full use of the buffer controller, the processing modules are designed according to the following three requirements: (1) The processing modules are designed ...

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Abstract

The invention discloses a sample importance resample particle filter hardware implementation method based on an FPGA. The method includes the following steps that firstly, a particle generation module is used for receiving input vectors to generate particles and then outputting the particles to a particle renewing module and a resample module; secondly, the particle renewing module is used for conducting renewing, namely, weight calculation and weight normalization, on the particles generated in the first step and then outputting the particles to the resample module; thirdly, the resample module conducts resample and state renewing on the particles renewed in the second step or the particles generated in the first step and then feeding the particles back to the particle generation module in the first step; fourthly, an output generation module conducts data generation and output on the particles renewed in the second step or the particles generated in the first step.

Description

technical field [0001] The invention relates to a hardware implementation method of a particle filter algorithm based on FPGA, a module-level assembly line design method using a data flow structure, and belongs to the field of nonlinear system filtering and electronic technology. Background technique [0002] Particle filter is a statistical filtering method based on Monte Carlo method and recursive Bayesian estimation, which is suitable for any nonlinear stochastic system with non-Gaussian background that can be represented by state space model and traditional Kalman filter. [0003] However, particle filtering has problems such as particle degradation, loss of particle diversity, year-on-year increase in the number of particles and computational complexity. On the other hand, the particle filter algorithm is more complex and the amount of calculation is relatively large, which makes the real-time performance of the particle filter very poor and hinders its practical applic...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03H17/02
Inventor 朱志宇吴将王彪李阳沈舒陈迅薛文涛黄巧亮戴晓强
Owner HUAWEI TEHCHNOLOGIES CO LTD
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