A word line driving method for providing positive and negative high voltages for floating gate memories

Abstract

The invention discloses a word line drive device and a word line drive method for supplying positive and negative high voltages for a floating gate memory. The device includes a P-type transistor, a first N-type transistor and a second N-type transistor. A gate terminal of the P-type transistor, the gate terminal of the first N-type transistor and a first input port which is used for inputting a voltage are connected together. A source terminal of the P-type transistor is connected to a second input port which is used for inputting a voltage. A drain terminal of the first N-type transistor is connected to ground. The drain terminal of the second N-type transistor is connected to a third input port which is used for inputting a voltage. The gate terminal of the second N-type transistor is connected to a fourth input port which is used for inputting a voltage. The drain terminal of the P-type transistor, the source terminal of the first N-type transistor, the source terminal of the second N-type transistor and a word line output port which is used for outputting a voltage are connected together. By means of the method and the device, a voltage difference between the gate terminal of a non-selected unit and a substrate can be reduced during erasure, the FN erasure effect can be decreased and operation accuracy of a memory system can be increased.

Description

technical field [0001] 本发明涉及数据存储技术领域,尤其涉及一种为浮栅存储器提供正负高压的字线驱动方法。 Background technique [0002] 存储器中存在着擦除,编程,读取以及验证等操作模式,在这几种操作模式中,需要在字线WL方向施加不同的操作电压。对于同一种操作模式的选中单元和未选中单元,字线WL上施加的电压不同,甚至会出现超过工艺中源漏击穿电压的电压差,这就对传统的字线驱动提出了挑战。 [0003] 随着特征尺寸的减小,浮栅存储器中外围电路的尺寸进一步缩小,耐受电压有所降低。但作为存储核心的浮栅器件,其需要的操作电压并没有显著降低。这就对传统的外围电压切换电路提出了挑战,所需传输电压没有变化,而器件所能耐受的最大电压减小了。尤其在擦除操作中,如 figure 1 所示,需要在选中的擦除单元A和B栅端施加负高压,在未选中单元C和D的栅端施加正高压以避免误擦除。这两种高压需要同一组字线驱动电路来传递,使得正负两个高电压出现在一个MOS管的源漏两端,在保证擦除效率的前提下,负高压不能大幅度减小,只能通过减小正高压来满足器件安全工作的要求。 [0004] 例如,现有技术中,传统的NAND型字线驱动电路如 figure 2 所示,其擦除时的操作表如下表所示: [0005] [0006] [0007] 这种传统的字线驱动电路(WL driver)存在一定缺陷。可以看到无论对于选中单元A和B或者未选中单元C和D,均会有管子的源漏两端承受9.5V的电压差。在小尺寸工艺中,这已经接近管子的源漏击穿电压,无法进一步提高未选中单元字线输出端口WL的电压,这使得未选中单元对于擦除效应的抑制作用受到限制,影响了电路性能。 [0008] 又如,现有技术中,传统的NOR型字线驱动电路如 image 3 所示,其擦除时的操作表如下表所示: [0009] [0010] 这种传统的字线驱动电路(WL driver)存在着上述同NAND型字线驱动电路一样的缺陷。可以看到无论对于选中单元A和B或者未选中单元C和D,均会有管子的源漏两端承受9.5V的电压差。在小尺寸工艺中,这已经接近管子的源漏击穿电压,无法进一步提高未选中单元字线WL电压,这使得未选中单元对于擦除效应的抑...

AI Technical Summary

Problems solved by technology

In the small-scale process, this is already close to the source-drain breakdown voltage of the tube, and the word line WL voltage of unselected cells cannot be further increased, which limits the suppression effect of unselected cells on the erasing effect and affects circuit performance.

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