Comparator and clock signal generation circuit

Abstract

The present disclosure relates to comparators and clock signal generation circuits. A comparator for a clock signal generating circuit has first and second input transistors coupled to a comparator input signal. First and second hysteresis transistors are coupled between the input transistor and the output stage of the comparator and apply hysteresis to the comparison of the input signal. First and second hysteresis control transistors are coupled between the input transistor and the hysteresis transistor to isolate the hysteresis transistor from the input transistor under control of the hysteresis enable signal.

Description

technical field [0001] The present invention relates to integrated circuits, and more particularly to a comparator and clock signal generating circuit. Background technique [0002] A crystal oscillator circuit is commonly used to generate an oscillating signal and can be used to provide a clock signal. The start-up of a crystal oscillator is achieved by using a random noise signal that excites the crystal to start oscillating at its natural frequency. The signal generated by the crystal is then amplified and applied to excite the crystal, gradually increasing the strength of the signal at the crystal's resonant frequency until its frequency dominates the output of the crystal circuit. [0003] However, certain spurious frequencies may persist for significant periods of time during crystal oscillator start-up and may result in poor or unstable clock signals being generated. Such an unstable clock signal can cause erroneous operation of other circuits that depend on the clo...

AI Technical Summary

Problems solved by technology

[0003] However, certain spurious frequencies can persist for considerable periods of time during crystal oscillator start-up and can result in poor or unstable clock signals being generated

This unstable clock signal can cause erroneous operation of other circuits that depend on the clock signal

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