Buffer allocation method and device thereof

A cache allocation and cache technology, applied in the storage field, can solve the problems of high cost, inability to take advantage of multiple SSDRAID, low cost performance, etc., and achieve the effect of improving utilization efficiency

Active Publication Date: 2014-12-03
MACROSAN TECH
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AI Technical Summary

Problems solved by technology

Under such circumstances, on the one hand, the IO on multiple SSD RAIDs is not fully concurrent, and the advantages of multiple SSD RAIDs in IO performance cannot be fully utilized; on the other hand, the cost of the SSD disk itself is usually high, and the cost-effective High will affect the user's return on investment, which is obviously unacceptable to the user

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  • Buffer allocation method and device thereof
  • Buffer allocation method and device thereof
  • Buffer allocation method and device thereof

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Embodiment Construction

[0021] The present invention re-examines the balanced use of the hotspot resource pool as the second-level cache from the perspective of balance, so as to greatly improve the utilization efficiency of the second-level cache. In the entire storage system, the access speed of the hotspot resource pool is usually lower than that of the first-level cache, but greater than that of the back-end storage resources (such as HDDRAID composed of HDDs). Similarly, its space capacity is also between the first-level cache and the back-end storage. Between, usually greater than the former and less than the latter. In a preferred manner, the storage medium included in the hotspot resource pool is an SSD. Considering the diversity of storage media and the possibility of more new storage media appearing in the future, the present invention does not limit the specific form of the storage medium in the hotspot resource pool. But judging from the current development, SSD is a cost-effective choice...

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Abstract

The invention provides a buffer allocation method and a device thereof, which are applied to a storage system. The storage system comprises a hot resource pool, a backend storage resource and a first-level buffer, wherein the hot resource pool comprises a plurality of hot resources HA, and each HA comprises a plurality of hot blocks HB. The method comprises the following steps of when the new hot data occurs, judging if the hot resource pool has the idle HB or not; if the hot resource pool has the idle HB, determining the target HA according to the preset primary balance rule, and selecting the target HB from the idle HB of the target HA for the new hot data; if the hot resource pool has no idle HB, selecting the target HB from the HB of which the data hot degree is lower than the hot degree of new hot data for the new hot data according to the preset secondary balance rule; backing up the new hot data from the back end storage resource into the target HB. Compared with the prior art, the method has the advantages that the problem of balance in the allocation process of secondary buffer resources is sufficiently considered, and the integral utilization efficiency of the secondary buffer resources is greatly improved.

Description

technical field [0001] The present invention relates to the field of storage technology, in particular to a method and device for allocating cache in a storage system. Background technique [0002] In the field of storage, cache is usually located between the application program and the physical storage medium (mainly refers to the mechanical disk), and is used to temporarily store the memory area of ​​application data. The main purpose of introducing caching in the system design is to reduce the response delay of the read and write commands of the application, thereby improving the overall performance of the application. In the traditional sense, cache usually refers to the first-level cache, such as DRAM Cache, which is characterized by small capacity and high price. Considering the large performance gap between DRAM Cache and mechanical hard disk, the second-level cache technology appeared. The performance of L2 cache is lower than that of DRAM Cache, but it has larger c...

Claims

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Application Information

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IPC IPC(8): G06F12/08G06F12/0897
Inventor 苏伟上官应兰
Owner MACROSAN TECH
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