A kind of management method and processor of instruction cache

Abstract

And a processor management method, the actual computer FIELD The present invention provides a embodiment instruction cache, the instruction cache capacity can be increased hardware thread, reduced instruction cache miss rate and improve system performance.Share the processor's instruction cache hardware thread identifier is used to identify the cache line in instruction cache shared hardware thread corresponding private replacement instruction cache for storing instructions from the instruction cache shared cache line, further comprising a deletion cache, when the thread processor hardware when the instruction is fetched from the instruction cache, while access to the shared instruction cache and instruction cache hardware thread corresponding private instruction cache, instruction cache and the shared hardware is determined corresponding to the thread private instruction whether there is an instruction cache, and fetching instructions from the instruction cache or the shared hardware thread corresponding private instruction cache according to the determination result.Example embodiments of the present invention for management processor instruction cache.

Description

Technical field [0001] The present invention relates to the field of computers, in particular to a method and processor for managing instruction cache. Background technique [0002] CPU (Central Processing Unit, central processing unit) Cache Memory is a temporary memory located between the CPU and the memory. Its capacity is much smaller than that of the memory. It solves the contradiction between the CPU operation speed and the memory read and write speed. CPU read speed. [0003] In a multi-threaded processor, multiple hardware threads obtain instructions from the same I-Cache (instruction cache). When the instruction to be obtained does not exist in the I-Cache, while sending a missing request to the next level of Cache, Switching to other hardware threads to access the I-Cache to continue to fetch instructions, reducing the stall caused by the lack of I-Cache in the pipeline, and improving the efficiency of the pipeline. However, when the shared I-Cache resources allocated b...

AI Technical Summary

Problems solved by technology

However, when the shared I-Cache resources assigned to each hardware thread are insufficient, the I-Cache miss rate increases, and the missing requests sent from the I-Cache to the next-level Cache will occur frequently, and instructions will be retrieved from the next-level Cache. When backfilling, when the thread data increases, the Cache line where the filled instruction is located will be immediately filled into the missing I-Cache and will not be used immediately, and the replaced Cache line may be used again

[0004] In addition, when adjusting the scheduling strategy of Thread (thread) according to the Cache hit situation, it will try to ensure that the thread with a high hit rate of memory access instructions in the Cache is prioritized for a period of time, but for the shared I allocated to each hardware thread -The problem of insufficient Cache resources has not been improved

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