TSV filling method

Abstract

The invention discloses a method for filling through-silicon vias, which includes: 1) depositing a dielectric layer on a silicon substrate, etching the dielectric layer and the silicon substrate to form grooves or holes; Deposit an oxide layer on the surface, the sidewall and bottom of the trench or hole; 3) On the surface of the oxide layer formed in step 2), deposit a metal adhesion layer and a metal barrier layer in sequence, and use the metal adhesion layer and metal barrier layer layer as a metal pad layer; 4) deposit tungsten on the surface of the metal barrier layer by simultaneous etching and filling of tungsten; 5) remove tungsten above the dielectric layer. The method of the invention is easy to operate, and at the same time, it can be integrated with the existing integrated circuit technology, and the existing production equipment can be used for processing, so the process difficulty and cost can be reduced.

Description

technical field [0001] The invention relates to a filling method in a semiconductor integrated circuit, in particular to a method for filling through-silicon holes. Background technique [0002] Through Silicon Via (TSV) is an emerging integrated circuit manufacturing process, suitable for various performance improvements, used in wireless local area networks and power amplifiers in mobile phones, and will greatly improve the frequency characteristics and power characteristics of the circuit . Because the through-silicon via technology connects the circuit made on the upper surface of the silicon chip to the back of the silicon chip through the metal filled in the through-silicon hole, combined with the three-dimensional packaging process, the IC (Integrated Circuit) layout develops from the traditional two-dimensional side-by-side arrangement to a more advanced one. Three-dimensional stacking, so that the component package is more compact, and the chip lead distance is sho...

AI Technical Summary

Problems solved by technology

There are also processes that make trenches in the front-end process and fill the trenches with silicon dioxide. Then, after the silicon wafer is thinned, the silicon dioxide-filled trenches are exposed, and the silicon dioxide in the trenches is removed by wet etching. Metal filling, this method can avoid via etching after thinning, but the process is more complicated and the cost is higher

[0004] In addition, there are also reports on the combination of tungsten filling process and tungsten etching back process. Although high aspect ratio TSV filling can be achieved, the thickness of a single tungsten filling is higher than the general process temperature and thicker. Therefore, in the deposition After the process is completed, due to the large difference in thermal expansion coefficient between the tungsten on the wafer surface and the silicon substrate (that is, due to stress), the silicon wafer has a large degree of warpage, and the metal tungsten is prone to peeling off. In severe cases, even cause fragmentation

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