Programmable high-speed differential interface

Abstract

The invention relates to a programmable high-speed differential interface. The programmable high-speed differential interface comprises an input channel, an output channel and a control module, wherein the input channel comprises a differential LVDS receiving module, an input clock adjustment module and a data inputting and boxing module, the an LVDS signal is converted into a single-end LVCMOS signal by the differential LVDS module and then is output, the data inputting and boxing module converts the single-end LVCMOS signal into parallel data and then inputs the parallel data to the interior, the output channel comprises a differential LVDS sending module, an output clock adjustment module and a data outputting and boxing module, the data outputting and boxing module converts the parallel data output from the interior into the single-end LVCMOS signal according to a complementary clock signal and then outputs the single-end LVCMOS signal, and the differential LVDS sending module converts the single-end LVCMOS signal into the LVDS signal, outputs the LVDS signal and outputs a differential clock signal at the same time. According to the programmable high-speed differential interface, the flexibility and the expansibility of a circuit can be improved, and manufacturing cost is reduced.

Description

technical field [0001] The invention belongs to the field of circuit high-speed interface, in particular to a programmable high-speed differential interface. Background technique [0002] In the field of high-speed interfaces, it is a common means to use differential signals to meet faster data output requirements. Sending a synchronous clock while transmitting data is a method to solve the signal synchronization at the receiving end, the most common is to send data once per clock cycle (SDR). With the increase of the transmission rate requirement, sending data (DDR) at the two edges of the clock at the same time has also become a development trend. [0003] The existing high-speed differential interfaces are all single-mode transmission signals, that is, they can only support LVDS transmission of DDR (Double Data Rate, double data rate) circuits, or can only support LVDS transmission of SDR (Single Data Rate, single data rate) circuits. ) circuit. It cannot meet the requ...

AI Technical Summary

Problems solved by technology

[0003] The existing high-speed differential interfaces are all single-mode transmission signals, that is, they can only support LVDS transmission of DDR (Double Data Rate, double data rate) circuits, or can only support LVDS transmission of SDR (Single Data Rate, single data rate) circuits. ) circuit

It cannot meet the needs of multi-mode high-speed differential interface transmission and cannot be expanded

Images