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Method, device and equipment for clock frequency offset detection

A technology of clock frequency deviation and detection method, which is applied in the field of communication, can solve problems such as complex operation of instruments, synchronous clock testing, etc., and achieve the effect of accurate test results and simple operation

Active Publication Date: 2019-01-11
ZTE CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The main technical problem to be solved by the embodiments of the present invention is to provide a clock frequency deviation detection method, device and equipment to solve the problem that measuring the synchronous clock frequency deviation in a communication network requires a test instrument and complicated operations

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  • Method, device and equipment for clock frequency offset detection
  • Method, device and equipment for clock frequency offset detection
  • Method, device and equipment for clock frequency offset detection

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Embodiment Construction

[0061] Embodiments of the present invention will be further described in detail below through specific implementation methods in conjunction with the accompanying drawings.

[0062] At present, in order to achieve network clock synchronization, the method of locking the upper-level clock reference source step by step is adopted, and finally the entire network is required to lock the same clock reference source. If it is necessary to judge whether two points in the network are really locked, a frequency offset detection technology is needed. An embodiment of the present invention provides a clock frequency offset detection method, which can simply and accurately realize the frequency offset detection of the clock, and further description will be given in combination with specific methods below.

[0063] See figure 1 As shown, the clock frequency offset detection method provided in this embodiment includes the following steps:

[0064] Step S101: Determine the clock port to be...

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Abstract

The present invention relates to the field of communications. Provided are a clock frequency offset detection method, an apparatus and a device. In a communications network, based on status of each clock port of a to-be-measured clock node, determining a to-be-measured clock port of the clock node; then determining whether a clock source corresponding to the to-be-measured clock port can be locked; if no, obtaining a time synchronization packet of the to-be-measured clock port as a frequency offset detection signal; and finally obtaining a frequency offset value of the to-be-measured clock port based on the frequency offset detection signal. Frequency offset detection can be implemented on a synchronous clock in the communications network without depending on other instrument devices in the communications network; thus whether clock synchronization is really implemented and whether a false synchronization phenomenon exists are determined, and frequency offset detection on a network clock is implemented more accurate and simpler.

Description

technical field [0001] The present invention relates to the communication field, in particular to a clock frequency offset detection method, device and equipment. Background technique [0002] In various telecommunication services, PTN networks and SDH transmission networks, in order to ensure the integrity of timing transmission, there are certain requirements on the quality of network synchronization. In the network synchronization system, by locking the upper-level clock reference source step by step, the entire network is finally required to lock the same clock reference source. [0003] The clock synchronization of the entire network can be finally realized by locking the mode of the upper-level clock reference source step by step. Under normal circumstances, after the clocks are synchronized, there will be no bit errors caused by the frequency deviation of the clocks in the service. However, when it is necessary to know whether there is a frequency offset between two...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04J3/06
CPCH04J3/14H04J3/0667H04J3/0688
Inventor 赵贵余何力李延源
Owner ZTE CORP