Shift register unit, grid electrode drive circuit and driving method thereof, and array substrate

A technology of a gate drive circuit and a shift register, which is applied in the field of a shift register unit, a gate drive circuit and its driving method, and an array substrate, and can solve problems such as the inability to meet the design requirements of ultra-narrow borders or no borders

Active Publication Date: 2015-08-12
BOE TECH GRP CO LTD +1
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] Embodiments of the present invention provide a shift register unit, a gate drive circuit and its driving method, and an array subs...

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  • Shift register unit, grid electrode drive circuit and driving method thereof, and array substrate
  • Shift register unit, grid electrode drive circuit and driving method thereof, and array substrate
  • Shift register unit, grid electrode drive circuit and driving method thereof, and array substrate

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Embodiment Construction

[0036] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0037] An embodiment of the present invention provides a shift register unit, such as figure 1 As shown, it may include a first input module 10 , a first reset module 20 , a pull-up module 30 , a pull-down control module 40 , a pull-down module 50 , a first output module 60 and a second output module 70 .

[0038] Specifically, the first input module 10 is respectively connected to the pull-up control node PU, the first voltage terminal VDD and the first signa...

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Abstract

The invention embodiment provides a shift register unit, a grid electrode drive circuit and a driving method thereof, and an array substrate, and relates to the display technical field, thus solving the problems that a high resolution display panel cannot satisfy ultra-narrow frame or non-frame design requirements. The shift register unit comprises a first input module connected with a first voltage end and a first signal input end; a first reset module connected with a second voltage end and a first reset signal end; a pull-up module connected with a first clock signal end, a first output module, a second output module and a third signal output end; a pull-down control module connected with a second clock signal end and a third voltage end; a pull-down module connected with a third voltage end and the pull-up module; a first output module connected with the pull-up module, a third clock signal end and a first signal output end; a second output module connected with the pull-up module, a fourth clock signal end, and a second signal output end. The shift register unit is applied to display manufacture.

Description

technical field [0001] The present invention relates to the field of display technology, in particular to a shift register unit, a gate driving circuit and a driving method thereof, and an array substrate. Background technique [0002] Liquid crystal display (full name in English: Liquid Crystal Display, abbreviation: LCD) has the advantages of low radiation, small size, and low energy consumption, and is widely used in electronic products such as notebook computers, flat-screen TVs, and mobile phones. A liquid crystal display is made up of pixel units arranged in a matrix. When the liquid crystal display is displayed, the data drive circuit can lock the input display data and clock signal timing sequence, convert it into an analog signal and input it to the data line of the liquid crystal panel, and the gate drive circuit can shift the input clock signal The bit registers are converted into voltages that control the on / off of pixels, and are applied to the gate lines of th...

Claims

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Application Information

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IPC IPC(8): G09G3/36G11C19/28
CPCG09G2300/0408G11C19/287G09G3/3677G09G2310/0286G09G3/3688G09G2300/0426G09G2310/0289G09G2310/08G11C19/28
Inventor 庞凤春
Owner BOE TECH GRP CO LTD
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