Alignment structure for making through-silicon vias and method for making through-silicon holes
A fabrication method and through-silicon via technology, which are applied in semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, semiconductor devices, etc., can solve the problems of difficult and fast alignment of the alignment structure, and improve the alignment degree. Effect
Active Publication Date: 2019-01-08
SEMICON MFG INT (SHANGHAI) CORP
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[0006] The purpose of this application is to provide an alignment structure for making through-silicon vias and a method for making through-silicon vias, so as to solve the problem that the alignment structure for making through-silicon vias in the prior art is difficult to align quickly and accurately
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[0055] It should be noted that the following detailed description is exemplary and intended to provide further explanation of the application. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs.
[0056] It should be noted that the terminology used herein is for the purpose of describing specific embodiments only, and is not intended to limit the exemplary embodiments according to the present application. As used herein, unless the context clearly dictates otherwise, the singular is intended to include the plural as well, furthermore, it should also be understood that when used in this specification of "comprising" and / or "comprising", it indicates There are features, steps, operations, devices, components and / or combinations thereof.
[0057] For ease of description, spatially relative terms such as "on", "over", "on the surface", "above", ...
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Abstract
The present invention provides an alignment structure for silicon through hole manufacture and a method for manufacturing a silicon through hole. The alignment structure comprises a substrate, an interlayer dielectric layer arranged on the surface of the substrate, a first dielectric layer arranged on the surface of the interlayer dielectric layer far from the substrate, a groove which goes through the interlayer dielectric layer and the first dielectric layer, a metal layer which is arranged along the inner wall of the groove, and a nitride layer arranged on the metal layer. The groove is provided with a recess which is arranged on the nitride layer. Since the groove is internally provided with the recess, after a first metal interconnection layer is formed, due to the existence of the recess, the recess is needed to be filled when the first metal interconnection layer is manufactured and a small recess is formed at the surface of the first metal interconnection layer, thus when the groove is used to carry out alignment, the alignment structure can be rapidly found and aligned by using the rough surface characteristic, and the alignment degree of the formed silicon through hole is improved.
Description
technical field [0001] The present application relates to the technical field of semiconductor manufacturing, and in particular, to an alignment structure for fabricating through-silicon vias and a method for fabricating through-silicon vias. Background technique [0002] In recent years, with the development of three-dimensional stacking technology and MEMS packaging technology, through-silicon via (TSV, Through-Silicon-Via) interconnect technology has received great attention. TSV realizes three-dimensional data transmission by making vertical conduction between chips, thereby shortening the transmission distance, saving the surface area of the chip and reducing power consumption. Using TSV technology, Intel, IBM and other companies have achieved major breakthroughs in the field of stacked chip technology and achieved commercial production. At present, more and more companies have invested in the research and development of TSV technology. [0003] Based on different ap...
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IPC IPC(8): H01L23/544H01L21/768
Inventor 严琰
Owner SEMICON MFG INT (SHANGHAI) CORP