A method of acquiring topology information of fpga based on text tree structure model

Abstract

The present invention is a method for obtaining FPGA topology information based on a text tree structure model. First, the format of the function module is set, and then the FPGA project is divided with the function module as the smallest unit, and a text tree describing the topological relationship between instantiated modules is established. Then, based on the text tree structure model, the parent-child relationship between instantiated modules is determined layer by layer from the top-level module, and the hierarchical relationship between the top-level module of the FPGA project and all instantiated modules is obtained, and the abstraction of text information is completed. . Finally, the topological information is stored and output in the form of text files. This method realizes the abstraction of the text information of the topological relationship graph of the FPGA engineering module, completes the conversion from graph theory information to readable and writable text information, realizes the complex and multi-level division of the topological relationship of the FPGA engineering module and the extraction of text information, and improves the module topology. Relationship partitioning efficiency.

Description

technical field [0001] The invention belongs to the field of system protection and relates to the calculation of FPGA engineering protection cost, which can be used to divide FPGA modules and search for variable layer topological relations in any module. Background technique [0002] Electronic devices in the aerospace field are often impacted by space high-energy particles and the logic state of the circuit changes. This phenomenon is called the single event effect. Single event effects will pose a great threat to the safety of spacecraft, so people are very concerned about it. In order to alleviate the impact of single event effects on the system, it is necessary to properly protect the target system, which involves the calculation of FPGA engineering protection costs. [0003] In order to calculate the protection cost of the FPGA module, it is often necessary to divide the FPGA project first, and then analyze the topological relationship between the modules. Existing me...

AI Technical Summary

Problems solved by technology

Existing methods usually use ISE software to analyze the topology information between FPGA engineering modules, but this method has the following two disadvantages: 1. ISE software can only describe the topology information between modules in the form of images, and cannot 2. The module topology diagram of the ISE software describes the topology information between modules starting from the top-level module and ending with the bottom-level module

When the user needs to view the topology information inside the non-top-level module, he must first find the position of the module to be analyzed in the topology diagram. In this process, the user is easily disturbed by the information of irrelevant functional modules.

When the user wants to view the topology information of the specified layer of the functional module, it is necessary to judge the layer to which each piece of topology information belongs. In this process, the user is easily disturbed by irrelevant layer information.

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