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Semiconductor substrate, semiconductor package structure and manufacturing method thereof

A technology of packaging structure and manufacturing method, which is applied in semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components and other directions, and can solve problems such as increasing the thickness of the substrate

Active Publication Date: 2017-11-28
ADVANCED SEMICON ENG INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Since the main components of pre-impregnated synthetic fibers are resin and glass fibers, a relatively thick dielectric layer is required in the design to maintain the structural strength of the semiconductor substrate, and thus increase the thickness of the substrate

Method used

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  • Semiconductor substrate, semiconductor package structure and manufacturing method thereof
  • Semiconductor substrate, semiconductor package structure and manufacturing method thereof
  • Semiconductor substrate, semiconductor package structure and manufacturing method thereof

Examples

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Embodiment Construction

[0022] see Figure 1A , FIG. 1 is a schematic diagram of a semiconductor substrate according to an embodiment of the present invention. Such as Figure 1A As shown, in one embodiment of the present invention, the semiconductor substrate 1a includes: a first patterned metal layer 13, a first dielectric layer 14, a second patterned metal layer 15, a conductive substance 15a, a second dielectric layer 16 and carrier layer 17 .

[0023] The first patterned metal layer 13 may include, but is not limited to, copper or other metals. The minimum line spacing and line width of the lines formed by the first patterned metal layer 13 may be 15 micrometers (μm). The first patterned metal layer 13 has a thickness from 5 microns to 20 microns.

[0024] The second patterned metal layer 15 is located below the first patterned metal layer 13 . The second patterned metal layer 15 may include, but is not limited to, copper or other metals. The second patterned metal layer 15 has a thickness f...

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Abstract

The invention relates to a semiconductor substrate, a semiconductor packaging structure and a manufacturing method thereof. The semiconductor substrate includes: a first patterned metal layer, a second patterned metal layer, a first dielectric layer, a second dielectric layer and a carrier layer. The second patterned metal layer is located under the first patterned metal layer. The first dielectric layer is located between the first patterned metal layer and the second patterned metal layer. The first dielectric layer includes at least one via hole. The at least one via extends from the first patterned metal layer to the second patterned metal layer. The at least one via electrically connects the first patterned metal layer to the second patterned metal layer. The second dielectric layer is adjacent to the first dielectric layer. The second dielectric layer covers the second patterned metal layer. The second dielectric layer has a plurality of first openings to expose the second patterned metal layer. The carrier layer is adjacent to the second dielectric layer and has a plurality of second openings. The location of each of the second openings substantially corresponds to the location of each of the first openings.

Description

technical field [0001] The invention relates to a semiconductor substrate, a semiconductor packaging structure and a manufacturing method thereof. Background technique [0002] Most semiconductor substrates use pre-pregnant composite fibers (Pre-pregnated composite fibers / Prepreg / P.P.) as the material of the dielectric layer. Since the main components of pre-impregnated synthetic fibers are resin and glass fibers, a relatively thick dielectric layer is required in the design to maintain the structural strength of the semiconductor substrate, thus increasing the thickness of the substrate. Contents of the invention [0003] One embodiment of the present invention relates to a semiconductor substrate. The semiconductor substrate includes a first patterned metal layer, a second patterned metal layer, a first dielectric layer, a second dielectric layer and a carrier layer. The second patterned metal layer is located under the first patterned metal layer. The first dielectri...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/482H01L23/522H01L21/48H01L21/768
CPCH01L2221/68345H01L2221/68381H01L2224/13023H01L2224/131H01L2224/13147H01L2224/16237H01L23/3128H01L24/16H01L21/486H01L21/6835H01L23/49811H01L23/49827H01L24/81H01L2224/16235H01L2924/014H01L2924/00014H01L21/4853H01L21/565H01L21/76801H01L21/76877H01L23/3107H01L24/11H01L24/17H01L2221/68359H01L2221/68372H01L2224/11334H01L2224/16113H01L2224/81801H01L23/3121H01L23/3142H01L21/4857H01L23/3114H01L23/49822H01L23/49838
Inventor 李志成苏洹漳何政霖吴崇铭颜尤龙
Owner ADVANCED SEMICON ENG INC