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Static protection circuit

An electrostatic protection and circuit technology, applied in circuits, electrical components, electrical solid devices, etc., can solve the problems of low bleeder capacity and high snapback voltage, to improve bleeder capacity, reduce snapback voltage, and effectively snapback voltage Effect

Active Publication Date: 2018-06-19
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The triode is a lateral triode composed of the source region 208, the body region 203 and the drift region 204. The snapback voltage of this lateral triode is very high and the leakage capacity is low.

Method used

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Embodiment Construction

[0029] Such as image 3 Shown is a schematic diagram of the cross-sectional structure of the electrostatic protection circuit of the embodiment of the present invention; corresponding to Figure 4 Sectional view along dashed line AA in the layout shown. The electrostatic protection circuit in the embodiment of the present invention includes a P-type LDMOS device, and the P-type LDMOS device includes: an N-type lightly doped body region 3, a P-type lightly doped drift region 4, a gate dielectric layer such as a gate oxide layer 6, Polysilicon gate 7.

[0030] Both the body region 3 and the drift region 4 are surrounded by an N-type lightly doped buried layer 2, the doping concentration of the buried layer 2 is less than that of the body region 3, and the body region 3 and The drift region 4 is in direct lateral contact or achieves lateral contact through the doped region of the buried layer 2, image 3 The buried layer 2 is separated between the body region 3 and the drift r...

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PUM

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Abstract

The invention discloses an electrostatic protection circuit. The electrostatic protection circuit includes a P-type LDMOS device, and the P-type LDMOS device includes: an N-type lightly doped body region, a P-type lightly doped drift region, a gate dielectric layer, and a polysilicon gate; In the body region, a source region composed of a P+ region and a body lead-out region composed of an N+ region are formed; in the drift region, a drain P+ diffusion region composed of a P+ region and a drain N+ diffusion region composed of an N+ region are formed. region; the source region and the body region lead-out region are connected to the electrostatic entry end, and the polysilicon gate, the drain P+ diffusion region and the drain N+ diffusion region are all grounded. By adding an N+ region to the drift region of the P-type LDMOS device, the present invention can form a positive feedback structure composed of parasitic PNP and NPN transistors in the electrostatic discharge process, thereby improving the discharge capacity, reducing the snapback voltage and realizing The snapback voltage can be flexibly adjusted and the trigger voltage can be kept constant.

Description

technical field [0001] The invention relates to a semiconductor integrated circuit, in particular to an electrostatic protection circuit. Background technique [0002] Such as figure 1 Shown is the application circuit diagram of the electrostatic protection circuit; the electrostatic protection circuit 102 is arranged between the input and output pads 101 and the ground, and when static electricity appears in the input and output pads 101, the electrostatic protection circuit 102 is triggered and discharges the static electricity. Thus, the protection of the internal circuit 103 is realized. [0003] Such as figure 2 Shown is a schematic diagram of the cross-sectional structure of the existing electrostatic protection circuit; figure 2 The circuit shown adopts a high-voltage PLDMOS structure, and an N-type buried layer 202 is formed on a P-type semiconductor substrate such as a silicon substrate 201, and a body region 203 composed of a high-voltage N well and a high-vol...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/02
Inventor 苏庆
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP