Unlock instant, AI-driven research and patent intelligence for your innovation.
A method of etching a soft dielectric substrate to form a circuit
What is Al technical title?
Al technical title is built by PatSnap Al team. It summarizes the technical point description of the patent document.
A dielectric substrate and circuit technology, applied in the field of microwave and millimeter wave integrated circuit manufacturing, can solve the problems of incomplete etching of the gold layer, prolonged etching time, increased etching time, etc., and achieve wide process window, strong stability, and use safe effect
Active Publication Date: 2018-05-29
THE 41ST INST OF CHINA ELECTRONICS TECH GRP
View PDF6 Cites 0 Cited by
Summary
Abstract
Description
Claims
Application Information
AI Technical Summary
This helps you quickly interpret patents by identifying the three key elements:
Problems solved by technology
Method used
Benefits of technology
Problems solved by technology
Scrubbing with absorbent cotton balls is also limited to solve the problem of deposit residue adhering to the copper layer, resulting in incomplete etching of the gold layer, and at the same time bringing serious difficulties to the subsequent etching of the copper layer. Etching time to achieve circuit pattern production
However, the prolongation of the wet etching time of the gold layer and the copper layer in the area protected by the resist mask increases the amount of side corrosion of the gold layer and the copper layer on the strip line in the area protected by the resist mask, and increases the number of defects on the circuit pattern. The quantity, it is impossible to obtain high-precision fine copper-gold circuit and copper-gold electrode layer on the soft dielectric PTFE substrate
Method used
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more
Image
Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
Click on the blue label to locate the original text in one second.
Reading with bidirectional positioning of images and text.
Smart Image
Examples
Experimental program
Comparison scheme
Effect test
Embodiment 1
[0028] combine figure 1 As shown, a method for etching a soft dielectric substrate to form a circuit includes the following steps:
[0029] Step 1 provides a soft dielectric substrate 101, such as figure 2 shown. The soft dielectric substrate 101 is made of polytetrafluoroethylene RT / duroid 5880 with a thickness of 0.127mm.
[0030] The surface of the dielectric substrate 101 is covered with a copper conductor layer 102 and a gold conductor layer 104 sequentially from inside to outside. The thickness of the copper conductor layer 102 is 17 μm, and the thickness of the gold conductor layer 104 is 2 μm.
[0031] A resist 105 pattern is formed on the gold conductor layer 104, and the resist may be a UV-sensitive positive photoresist.
[0032] The formation process of the resist 105 pattern is as follows: Spin-coat a layer of BP-218 type positive photoresist on the surface of the gold conductor layer 104, the coating rotation speed is 3000rpm, the coating time is 30s, and then...
Embodiment 2
[0039] combine figure 1 As shown, a method for etching a soft dielectric substrate to form a circuit includes the following steps:
[0040] Step 1 provides a soft dielectric substrate 101, such as figure 2 shown. The soft dielectric substrate 101 is made of polytetrafluoroethylene RT / duroid 5870 with a thickness of 0.254 mm.
[0041] The surface of the dielectric substrate 101 is covered with a copper conductor layer 102 and a gold conductor layer 104 sequentially from inside to outside. The thickness of the copper conductor layer 102 is 17 μm, and the thickness of the gold conductor layer 104 is 2 μm.
[0042] A resist 105 pattern is formed on the gold conductor layer 104, and the resist is an ultraviolet-sensitive negative photoresist.
[0043] The formation process of the resist 105 pattern is as follows: Spin-coat a layer of BN308-150 negative photoresist on the surface of the gold conductor layer 104, the coating rotation speed is 4000rpm, and the coating time is 30s,...
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More
PUM
Property
Measurement
Unit
thickness
aaaaa
aaaaa
thickness
aaaaa
aaaaa
Login to View More
Abstract
The invention discloses an etching method for a soft dielectric circuit, which comprises the steps: s1 providing a soft dielectric substrate, the surface of the soft dielectric substrate is covered with a copper conductor layer and a gold conductor layer sequentially from the inside to the outside, and the gold conductor layer form a resist pattern; s2 uses iodine-potassium iodide solution to etch the gold conductor layer until the interface between the gold conductor layer and the copper conductor layer is etched; s3 uses potassium iodide aqueous solution to soak the gold conductor layer and the copper conductor layer interface; s4 Use iodine-potassium iodide solution and potassium iodide aqueous solution to alternately treat the interface between the gold conductor layer and the copper conductor layer until the copper conductor layer on the surface of the unprotected area of the resist on the soft dielectric substrate is completely exposed; s5 etches the copper conductor layer to remove the resist agent. The method of the present invention uses the potassium iodide aqueous solution to quickly and effectively dissolve the white insoluble precipitate generated when the iodine-potassium iodide solution corrodes the interface between the gold conductor layer and the copper conductor layer, and can process the copper-gold circuit and copper-gold on the soft dielectric substrate with high precision electrode layer.
Description
technical field [0001] The invention belongs to the technical field of microwave and millimeter wave integrated circuit manufacturing, and relates to a method for etching a soft dielectric substrate to form a circuit. Background technique [0002] Among the materials used in microwave and millimeter wave high-frequency circuits, soft dielectric polytetrafluoroethylene and its composite substrates have extremely low dielectric constant, small dielectric loss and low moisture absorption, making it suitable for ultra-high frequency applications. , ultra-wideband (2 to 10 octaves) microwave and millimeter wave circuits are widely used, which requires this kind of circuit to have a more perfect planar circuit pattern and highly reliable surface coating, not only to produce finer Line width / line spacing, flatter pads, and the final surface coating must meet assembly requirements such as gold wire bonding, soldering, and chip bonding. [0003] In view of the characteristics of man...
Claims
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More
Application Information
Patent Timeline
Application Date:The date an application was filed.
Publication Date:The date a patent or application was officially published.
First Publication Date:The earliest publication date of a patent with the same application number.
Issue Date:Publication date of the patent grant document.
PCT Entry Date:The Entry date of PCT National Phase.
Estimated Expiry Date:The statutory expiry date of a patent right according to the Patent Law, and it is the longest term of protection that the patent right can achieve without the termination of the patent right due to other reasons(Term extension factor has been taken into account ).
Invalid Date:Actual expiry date is based on effective date or publication date of legal transaction data of invalid patent.