A vertical GaN-based heterojunction semiconductor device and its manufacturing method

A GaN-based, manufacturing method technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problem that the utilization rate of chip area is not as effective as that of vertical high-voltage devices, and the utilization rate of surface area is not much improved, etc. problem, to achieve the effect of simple manufacturing method, effective power, and easy realization

Active Publication Date: 2019-09-03
M MOS SEMICON HK
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

All electrodes of the lateral gallium nitride-based heterojunction semiconductor device are placed on the surface of the device, and the active region in the surface structure of the device is also used to withstand the reverse bias voltage applied to the device, if The higher the reverse bias voltage, the wider the surface active area needs to be used, which leads to the fact that the chip area utilization rate is not as effective as vertical high-voltage devices. In contrast, the average output power per unit area of ​​the surface of lateral devices is much smaller than that of vertical devices. Vertical high-voltage devices, which is a major disadvantage of lateral devices
[0009] figure 2 The front cross-sectional view of a GaN device including buried contacts proposed for US Patent No. US8,569,799B2, such as figure 2 As shown, the GaN device including a buried contact includes a substrate 110, an unintentionally doped gallium nitride (GaN) buffer layer 120, aluminum nitride (AlN) 130, aluminum gallium nitride (AlGaN) The barrier layer 140, the cap layer 150, the metal layer 160, and the conductive material 180 make the electrode distribution of the lateral device become similar to the vertical device, that is, the anode (high voltage) is on one side of the device, and the cathode (low voltage) is on the other side. On the one hand, the structure described in this patent is only a "quasi" vertical structure, still relying on the width of the active area on the chip surface to withstand the reverse bias voltage, and the utilization rate of the surface area is not much improved compared with the general lateral device

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  • A vertical GaN-based heterojunction semiconductor device and its manufacturing method
  • A vertical GaN-based heterojunction semiconductor device and its manufacturing method
  • A vertical GaN-based heterojunction semiconductor device and its manufacturing method

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Embodiment 1

[0055] image 3 It is a front cross-sectional view of the structure of Embodiment 1 of the vertical gallium nitride-based heterojunction semiconductor device according to the present invention, such as image 3 As shown, the structure of the vertical gallium nitride-based heterojunction semiconductor device of the present invention includes a substrate 110, an unintentionally doped gallium nitride (GaN) buffer layer 120, an aluminum gallium nitride (AlGaN) barrier layer 140, and metal layer 160. An aluminum gallium nitride (AlGaN) barrier layer 140 is deposited on the longitudinal groove and surface of the unintentionally doped gallium nitride (GaN) buffer layer 120, and the unintentionally doped gallium nitride (GaN) buffer layer 120 A vertical GaN-based heterojunction is formed. The vertical GaN-based heterojunction connects the surface and the bottom surface, providing a channel for vertical current flow. The metal layer 160 is located on the surface of the vertical GaN-...

Embodiment 2

[0057] Figure 4 It is a front cross-sectional view of Embodiment 2 of a vertical gallium nitride-based heterojunction semiconductor device according to the present invention, such as Figure 4 As shown, the structure of the vertical gallium nitride-based heterojunction semiconductor device of this embodiment is similar to that of embodiment 1, except that the surface of the unintentionally doped gallium nitride (GaN) buffer layer 120 is mixed with aluminum nitrogen An N-type doped gallium nitride (GaN) layer 210 is also included between the gallium nitride (AlGaN) barrier layers 140 . The aluminum gallium nitride (AlGaN) barrier layer 140 and the unintentionally doped gallium nitride (GaN) buffer layer 120 form a vertical GaN-based heterojunction. The vertical GaN-based heterojunction connects the surface and the bottom surface, providing a channel for vertical current flow. The two-dimensional electron gas (2DEG) of the vertical gallium nitride-based heterojunction connect...

Embodiment 3

[0059] Figure 5 It is a front cross-sectional view of Embodiment 3 of a vertical gallium nitride-based heterojunction semiconductor device according to the present invention, as Figure 5 As shown, the structure of the vertical GaN-based heterojunction semiconductor device in this embodiment is similar to that in Embodiment 1, except that the aluminum gallium nitride (AlGaN) barrier layer 140 is deposited on the unintentionally doped In the vertical groove of the Gallium Nitride (GaN) buffer layer 120 . The aluminum gallium nitride (AlGaN) barrier layer 140 and the unintentionally doped gallium nitride (GaN) buffer layer 120 constitute a GaN vertical-based heterojunction and a vertical GaN-based heterojunction. The vertical GaN-based heterojunction connects the surface and the bottom surface, providing a channel for vertical current flow. The two-dimensional electron gas (2DEG) of the vertical gallium nitride-based heterojunction is connected to the metal layer 160 on the s...

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Abstract

The invention provides a longitudinal gallium nitride-based heterojunction semiconductor device and a manufacturing method thereof. The device comprises a substrate, a metal layer and a longitudinal gallium nitride-based heterojunction, wherein the longitudinal gallium nitride-based heterojunction is located at a GaN side of the heterojunction and comprises a longitudinal two-dimensional electron gas; and the longitudinal two-dimensional electron gas serves as a current channel from the surface to the bottom surface when the device is switched on. The method comprises the following steps: depositing unintentionally doped gallium nitride buffer layer on the surface of the substrate; etching the unintentionally doped gallium nitride buffer layer by a lithography mask; depositing an aluminum gallium nitride barrier layer to form the longitudinal gallium nitride-based heterojunction; and forming a metal layer on the surface by the lithography mask. The device chip provided by the invention can provide relatively high and effective power per unit area, so that the product has relatively good cost performance; and the manufacturing method is simple and easy to achieve.

Description

technical field [0001] The invention relates to a semiconductor device, in particular to a gallium nitride semiconductor device. Background technique [0002] Third-generation semiconductor materials, including CdS, ZnO, SiC, GaN, diamond, etc. The bandgap of these semiconductor materials is greater than 2.2eV. In terms of electronic devices, the research on SiC and GaN is relatively mature, and it is currently a hot spot in the field of semiconductor materials and device research in the world. [0003] Gallium nitride (GaN) has a band gap of 3.4eV. The wide band gap enables GaN materials to withstand higher operating temperatures and also enables GaN materials to have a larger breakdown electric field. A larger breakdown electric field means that the device can withstand Higher operating voltage can improve the power characteristics of the device. GaN also has high electron saturation drift velocity and high thermal conductivity. Generally speaking, GaN is an excellent ma...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/778H01L21/336
Inventor 欧阳伟伦梁安杰罗文健
Owner M MOS SEMICON HK
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