Vector vliw architecture graph coloring register grouping method

Abstract

A vector VLIW architecture diagram coloring register grouping allocation method comprises the following steps: S1, data model constructing; S2, network constructing and attribute analysis; S3, conflict analysis; S4, register merging: traversing the instructions of all basic blocks, not processing an instruction if the instruction is not a register transfer instruction, or, analyzing and processing the instruction according to the register category and grouping attribute; S5, conflict graph trimming: pressing all the nodes in a conflict graph into one stack according to the requirements of the register category and grouping attribute; and S6, physical register assigning: popping up the nodes in the stack in turn, and assigning a register meeting the requirements of the register category and grouping to a network corresponding to each node when the node is popped up, so as to enable any two nodes in conflict to get different registers. The method has the advantages of simple principle, easy implementation, and realization of effective register resource allocation in the global level of process.

Description

technical field [0001] The invention mainly relates to the technical field of code compilation optimization, in particular to a vector VLIW architecture diagram coloring register grouping method, which forms an intra-procedural global register allocation optimization technology for high-performance RISC processors with instruction conditional execution characteristics. Background technique [0002] Register allocation is one of the important processes to improve the instruction-level parallelism of the code. Its main function is to decide which values ​​should be saved in the registers at each point of program execution to obtain greater benefits, and to decide which value in which register. For most architectures, this is the most important optimization. [0003] Among various register allocation methods, the graph coloring method is a highly efficient method for intra-procedural global register allocation, which can achieve better code quality than other methods. [0004...

AI Technical Summary

Problems solved by technology

[0007] (3) Construct conflict graph

In this case, the factors affecting the conflict relationship between nodes increase, and the colorability of the conflict graph also becomes complicated

[0013] 2) The conflict graph of the traditional graph coloring method contains allocatable objects and actual registers

At this time, the aforementioned conflicting graph structure increases the time and space pressure on the graph coloring register allocation process, and limits the degrees of freedom for more aggressive register allocation optimization.

[0014] Generally speaking, the traditional graph coloring register allocation method has poor applicability on advanced architectures, and fails to fully consider the characteristics of the register resources of the architecture and the technology that supports instruction-level parallel development, which is not conducive to obtaining high-quality code , it is difficult to give full play to the performance of the hardware

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