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Semiconductor device

A semiconductor and electrical conductivity technology, applied in the direction of semiconductor devices, semiconductor/solid-state device components, electric solid-state devices, etc., can solve problems such as suppressing poor bump bonding

Pending Publication Date: 2016-11-23
KK TOSHIBA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] The problem to be solved by the embodiments is to suppress poor bonding of bumps

Method used

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  • Semiconductor device
  • Semiconductor device
  • Semiconductor device

Examples

Experimental program
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Effect test

no. 1 approach

[0019] figure 1 It is a figure which shows the structural example of a semiconductor device. figure 1 The shown semiconductor device 1 includes: a substrate 11; a plurality of conductive pads 12 disposed on the substrate 11; a substrate 21 facing the substrate 11 with the plurality of conductive pads 12 interposed therebetween. set in a manner; a plurality of conductive pads 22, which are arranged on the substrate 21 in a manner between the substrate 11 and the substrate 21; an insulating bonding layer 3, which connects the substrate 11 and the substrate 21 sealing; and a plurality of bumps 4. In addition, the number of conductive pads 12, conductive pads 22, and bumps 4 is not limited to figure 1 Quantity shown.

[0020] The substrate 11 may include, for example, a semiconductor substrate such as a silicon substrate, a glass substrate, a resin substrate, or a metal substrate. Furthermore, the substrate 11 may also have flexibility. Alternatively, a semiconductor element ...

no. 2 approach

[0053] Figure 8 It is a diagram showing a structural example of a semiconductor device in which semiconductor chips having penetrating electrodes such as TSVs are stacked. Figure 8 (A) is a bottom view, Figure 8 (B) is Figure 8 Sectional view of line segment A-B in (A). In addition, in Figure 8 In (A), some components are not shown for convenience. In addition, for the same components as those of the first embodiment, the description of the first embodiment can be appropriately cited.

[0054] Figure 8 (A) and Figure 8 The semiconductor device 100 shown in (B) includes: a wiring substrate 101 having a first surface and a second surface facing each other; a chip laminate 102 mounted on the first surface of the wiring substrate 101 the sealing resin layer 103, which seals between the wiring substrate 101 and the chip laminate 102; the sealing resin layer 104, which is provided to cover the chip laminate 102; and the external connection terminal 105, which is provid...

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PUM

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Abstract

The semiconductor device according to the embodiment of the present invention suppresses poor bonding of bumps. The semiconductor device of the embodiment includes: a first substrate; a plurality of first conductive pads provided on the first substrate; a second substrate having at least a semiconductor substrate and sandwiching the first conductive pads. The pads are arranged in a manner facing the first substrate; a plurality of second conductive pads are arranged on the second substrate in a manner between the first substrate and the second substrate; a layer sealing between the first substrate and the second substrate; and a plurality of bumps electrically connecting the plurality of first conductive pads with the plurality of second conductive pads. The plurality of bumps includes at least: a first bump having a first height; and a second bump disposed closer to the center of the second substrate than the first bump and having a height higher than the first bump. The height's second height.

Description

[0001] [Related applications] [0002] This application enjoys the priority of the basic application based on Japanese Patent Application No. 2014-188527 (filing date: September 17, 2014). This application includes the entire content of the basic application by referring to this basic application. technical field [0003] Embodiments relate to a semiconductor device. Background technique [0004] In flip chip bonding (flip chip bonding) in which a semiconductor chip is bonded to a mounting substrate or a semiconductor chip via bumps, it is known to use NCF (Non-Conductive Chip Bonding) while bonding semiconductor chips using bumps. Film: A method in which insulating adhesive materials such as NCF (non-conductive film) seal the junction. Insulating adhesive materials such as NCF have both functions of sealing and bonding, so there is no need to fill the underfill between the joints. [0005] In flip-chip bonding using an insulating adhesive material, bonding by bumps and s...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/488
Inventor 田中润
Owner KK TOSHIBA