Erasing/writing control circuit and method of nonvolatile memory

A non-volatile memory technology, which is applied in the field of non-volatile memory erasing control and non-volatile memory erasing control circuit, can solve the problem of non-optimal performance, optimize erasing time and reduce power consumption , Improving the effect of erasing and writing performance

Inactive Publication Date: 2017-01-11
SHANGHAI HUAHONG INTEGRATED CIRCUIT
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  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

And this set of parameters must be guaranteed to be effective for all erasing units within the ef...

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  • Erasing/writing control circuit and method of nonvolatile memory

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Embodiment Construction

[0017] As shown in the accompanying drawings, the non-volatile memory erasure control circuit includes: a main control circuit, a parameter register circuit, a comparison circuit, a data buffer circuit, an erasure control circuit and a read control circuit .

[0018] After receiving the erasing start signal and the data to be erased, the main control circuit sends a write enable signal to write the data to be erased into the data buffer circuit; then the main control circuit sends a parameter selection signal to the parameter register circuit. The parameter register circuit selects the corresponding erasing parameters with low erasing power consumption and short erasing time, and sends them to the erasing control circuit, and the main control circuit sends an erasing memory enable signal. After receiving the erasing parameter and the enabling signal of the erasing memory, the erasing control circuit generates an erasing memory control signal required for erasing the memory. T...

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Abstract

The invention discloses an erasing/writing control circuit of a nonvolatile memory. The erasing/writing control circuit comprises a main control circuit, a parameter register circuit, a comparison circuit, a data cache region circuit, the erasing/writing control circuit and a reading control circuit. The invention furthermore discloses an erasing/writing control method of the nonvolatile memory. In a process of erasing/writing the nonvolatile memory each time, firstly erasing/writing attempts to be performed by using a configuration parameter corresponding to low power consumption and short erasing/writing time. After the current operation of attempting to perform the easing/writing is finished, backward reading is performed and comparison with data stored in an internal cache region of the circuit is carried out. If the data is inconsistent, the erasing/writing attempts to be performed again by using a configuration parameter corresponding to higher power consumption and longer erasing/writing time, and the process is repeated until a comparison result displays that the data is consistent after the backward reading, so that the current erasing/writing work of the nonvolatile memory is finished. According to the control circuit, the erasing/writing time of the nonvolatile memory can be optimized, the power consumption of the erasing/writing period can be reduced, and the erasing/writing performance can be improved.

Description

technical field [0001] The invention relates to the field of non-volatile memory, in particular to a control circuit for erasing and writing of the non-volatile memory. The invention also relates to a method for controlling erasing and writing of the nonvolatile memory. Background technique [0002] For non-volatile memory, the power consumption required for erasing and writing is often three to four orders of magnitude greater than that required for reading, and the time required for erasing and writing is also three to four orders of magnitude greater than the time required for reading . For different erasing and writing unit blocks corresponding to the same non-volatile memory, the required erasing and writing time and erasing and writing power consumption are also different, and the difference can be more than one order of magnitude. Moreover, as the number of times of use increases, the circuit of the memory unit will age, thus requiring a longer erasing time and eras...

Claims

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Application Information

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IPC IPC(8): G11C16/14
Inventor 王吉健
Owner SHANGHAI HUAHONG INTEGRATED CIRCUIT
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