Unlock instant, AI-driven research and patent intelligence for your innovation.

A chip testing method and device

A chip testing and chip technology, which is applied in the electronic field, can solve the problems of low chip testing efficiency and achieve the effect of improving testing efficiency and shortening waiting time

Active Publication Date: 2020-09-11
NANTONG FUJITSU MICROELECTRONICS
View PDF12 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The technical problem mainly solved by the present invention is to provide a chip testing method and device, which can solve the problem of low chip testing efficiency

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • A chip testing method and device
  • A chip testing method and device
  • A chip testing method and device

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0051] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0052] During the test of the chip to be tested, the performance of the chip to be tested can be tested separately. At this time, the chip to be tested should be tested in sequence. The first performance test of the chip to be tested is performed first, and only after the first performance test , the second performance test can be performed, that is, the next performance test can only be performed after the previous performance test is completed, that is to say...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses a method and apparatus for testing a chip. The method includes the following steps: transmitting a to-be-tested chip to a first testing region so as to test a first property of the to-be-tested chip; transmitting the to-be-tested chip which qualifies the first property test to a second testing region so as to test a second property of the to-be-tested chip; based on the time the to-be-tested chip is tested in the testing regions, arranging a testing rail within each testing region and the number of corresponding testing devices, such that the number of the testing rails within the testing regions that consume long time in testing and the number of the corresponding testing devices are respectively greater than that of the testing rails within the testing regions that consume less time in testing and that of the testing devices. By virtue of the aforementioned method, according to the invention, the testing regions that consume less time in testing can have shorter time for waiting, thus increasing testing efficiency.

Description

technical field [0001] The invention relates to the field of electronics, in particular to a chip testing method and device. Background technique [0002] The quality of the chip needs to be judged through the testing process. In the semiconductor packaging and testing industry, chips are generally tested twice, one is wafer test, that is, the test before chip packaging, mainly to select good chips for subsequent packaging after the dicing process. factory or packaging factory, the test difficulty and cost are relatively low; the other is the second test after packaging, that is, final test (final test). During the final test, many performances of the chip need to be tested, such as pins Whether the connection is on, whether there is leakage, whether the function of the chip itself can be realized, whether the heat dissipation of the chip and whether the force or strength is qualified, etc. The time used for testing different performances of chips is different, and the tes...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): G01R31/26
CPCG01R31/2601
Inventor 李骏
Owner NANTONG FUJITSU MICROELECTRONICS