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Apparatus and method of reading and writing internal register file through I2C interface

A register file and I2C technology, applied in the field of electrical communication, can solve problems affecting power consumption, area performance indicators, and consuming I2C register resources, and achieve the effect of increasing testability and observability

Active Publication Date: 2017-05-10
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

For the internal register file, due to the large number of registers, storing the values ​​stored in each register into the I2C registers to achieve testability and observability will consume a large amount of I2C register resources, which will affect power consumption. Area and other performance indicators

Method used

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  • Apparatus and method of reading and writing internal register file through I2C interface
  • Apparatus and method of reading and writing internal register file through I2C interface
  • Apparatus and method of reading and writing internal register file through I2C interface

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0073] Such as figure 1 As shown, it is a schematic diagram of the structure of the device for reading and writing the internal register file through the I2C interface proposed in Embodiment 1. The device includes an I2C master, an I2C slave including three I2C registers, a read-write enable control module, and a read-write operation module. , and the specific functions of each part are described below.

[0074] The I2C master is used to send signals to the I2C slave and the read-write enable control module, and read the data in the I2C slave;

[0075] Three I2C registers, specifically:

[0076] The first I2C read-write register is used to store the ID value of the internal register that needs to be rewritten and the rewritten data, referred to as write ID and write data, and its value is the basis for the write operation of the read-write operation unit. The 12C host can Perform read and write control on the first I2C read and write register;

[0077] The second I2C read-w...

Embodiment 2

[0090] Such as Figure 4 As shown, it is a signal relationship diagram of the method for rewriting the internal register file through the I2C interface proposed in this embodiment, and the specific steps of rewriting are described as follows:

[0091] Step 11, the transmission process judging module in the read-write enable control module judges the start flag of the I2C transmission according to the change of the SCL and SDA line status, and the falling edge of the SDA signal when the SCL signal is at a high level indicates that the I2C When the transmission starts, the transmission process judging module will set the transmission process indication signal to 1 when detecting this change;

[0092] Step 12, the slave address and the transmission direction judging module in the read-write enabling control module judge according to the slave address value of the first seven bits and the transmission direction value of the eighth bit after the transmission process indication sign...

Embodiment 3

[0097] Such as Figure 5 As shown, it is a signal relationship diagram of the method for reading the internal register file through the I2C interface proposed in this embodiment, and the specific steps for reading are described as follows:

[0098] Step 21. The transmission process judging module in the read-write enable control module judges the start flag of the I2C transmission according to the change of the SCL and SDA online states. The falling edge of the SDA signal when the SCL signal is at a high level indicates that the I2C When the transmission starts, the transmission process judging module will set the transmission process indication signal to 1 when detecting this change;

[0099] Step 22, the slave address and the transmission direction judging module in the read-write enable control module judge according to the slave address value of the first seven bits and the transmission direction value of the eighth bit after the transmission process indication signal is v...

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Abstract

The present invention relates to an apparatus and a method of reading and writing an internal register file through an I2C interface. The apparatus comprises an I2C host, an I2C slave, a read and write operation unit, and a read and write enabling control unit. The I2C host sends a signal to the I2C slave and the read and write enabling control unit and reads data in the I2C slave. The I2C slave comprises a first I2C read and write register, a second I2C read and write register and an I2C read-only register that are respectively used for storing write ID and write data and read ID and read data. The read and write operation unit is used for performing read and write operations on the internal register file. The read and write enabling control unit is used for generating a read and write enabling signal according to the signal sent by the I2C host and setting 1 for controlling the read and write operation unit. When a write enabling signal is 1, the write operation is performed, and when a read enabling signal is 1, the read operation is performed and read data is fed back to the I2C read-only register. According to the apparatus and method, extra external interface overhead and internal stored circuit consumption are not increased, further, read and write are performed on the internal register file of the chip, so that the apparatus and method are significant for testable designs.

Description

technical field [0001] The invention belongs to the technical field of electric communication, and more specifically relates to a device and a method for reading and writing an internal register file through an I2C interface. Background technique [0002] The MIPI interface is a new high-speed interface with low power consumption and high transmission rate, which is widely used in mobile devices. MPHY IP is the most critical part of MIPI design. MPHY has significant advantages over other serial PHYs because it can flexibly configure multiple optional modes and attributes. This flexibility is achieved through MPHY's configuration area, which consists of register files, each of which has a specific ID number. Enhancing the testability and observability of configuration regions is critical to the design and verification of MPHY. [0003] However, in the chip design process, constraints such as area, power consumption, and the number of external interfaces limit the testable s...

Claims

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Application Information

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IPC IPC(8): G06F13/16G06F13/42
CPCG06F9/30043G06F9/30134G06F13/1668G06F13/4282G06F2213/0016
Inventor 任雪倩赵建中周玉梅辛卫华
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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