MOS-used adaptive body bias dynamic threshold generator

Abstract

The invention relates to an MOS-used adaptive body bias dynamic threshold generator, which particularly relates to an electronic device. The electronic device comprises a transistor with a body and a body bias circuit, wherein the body bias circuit comprises a threshold estimation circuit for estimating a threshold voltage of the transistor and a comparison circuit for comparing the threshold voltage of the transistor and a reference threshold voltage and thus generating a comparison signal. A bias adjustment circuit generates a body bias voltage for biasing the body of the transistor according to the comparison signal, and the body bias voltage is a voltage for adjusting the threshold voltage to the reference threshold voltage when being applied to the body of the transistor.

Description

technical field [0001] The present disclosure relates to the field of MOS technology, and more particularly to adaptive biasing of the body of a CMOS transistor. Background technique [0002] The development of densely packed transistors in integrated circuits is desirable. One technology that has matured to allow tight packing of transistors together in integrated circuits (ICs) is deep submicron technology. However, the performance of different integrated circuits (ICs), even on the same wafer using the same manufacturing process, varies. [0003] In some scenarios, the threshold of MOS transistors on the same IC may be higher, which results in a decrease in the maximum stable operating frequency and lower leakage current for that IC. In other scenarios, MOS transistors on the same IC may have lower thresholds, resulting in an increase in the maximum stable operating frequency for that chip, at the expense of higher leakage currents. [0004] By fixedly biasing the body...

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Problems solved by technology

[0003] In some scenarios, the threshold of MOS transistors on the same IC may be higher, which results in a decrease in the maximum stable operating frequency and lower leakage current for that IC

In other scenarios, the threshold of MOS transistors on the same IC may be lower, which results in an increase in the maximum stable operating frequency for that chip, at the cost of higher leakage current

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