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Vector processor-oriented vectorization realization method for two-dimensional matrix convolution

A vector processor and two-dimensional matrix technology, applied in the direction of electrical digital data processing, special data processing applications, instruments, etc., can solve the problems of large memory access and calculation time, poor parallel efficiency, etc., to achieve easy implementation and reduce access Storage, the effect of improving computing efficiency

Active Publication Date: 2017-07-21
NAT UNIV OF DEFENSE TECH
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AI Technical Summary

Benefits of technology

This technology allows for efficient computation by performing many different types simultaneously on one device instead of having each unit execute its own program individually. Instead of relying solely upon an external computer's main system (CPU) or disk drive, it uses a specific way that stores both matrices together. Overall, these technical improvements improve performance compared to previous methods such as CPU/disk drives alone.

Problems solved by technology

This patents describes various technical problem addressed in this patented technology that includes improving the performance of binary matrices when performing tensor computations on multiple dimensions or functions simultaneously due to its inherently serial nature. Current methods require significant amounts of memory accessing and computation times, making them challenging at best even if they could achieve higher accuracy than previous models.

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  • Vector processor-oriented vectorization realization method for two-dimensional matrix convolution
  • Vector processor-oriented vectorization realization method for two-dimensional matrix convolution
  • Vector processor-oriented vectorization realization method for two-dimensional matrix convolution

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Embodiment Construction

[0026] The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0027] like image 3 and Figure 4 Shown, the vectorized realization method of the vector processor-oriented two-dimensional matrix convolution of the present invention, its steps are:

[0028] S1: Input convolution matrix A and convolution kernel matrix B; Convolution matrix A and convolution kernel matrix B are transported to vector storage unit and scalar storage unit respectively by DMA controller;

[0029] S2: Multiply one row of elements of the convolution matrix A and one element of the convolution kernel matrix B corresponding to one row of elements after broadcasting, and the result of the multiplication is accumulated by an accumulation register initialized to 0;

[0030] S3: Take out the first K-1 elements of a row of elements taken out from the convolution matrix A in step S2 by shuffling instructions to the vector proce...

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Abstract

The invention discloses a vector processor-oriented vectorization realization method for two-dimensional matrix convolution. The method comprises the steps of S1, moving a convolution matrix A and a convolution matrix B to a vector storage unit and a scalar storage unit respectively through a DMA controller; S2, multiplying a row of elements of the convolution matrix A by a row of corresponding elements after broadcast of an element of the convolution matrix B in a one-to-one correspondence manner, and accumulating results; S3, extracting first K-1 elements of the row of the elements extracted from the convolution matrix A to a vector processing unit through a shuffle instruction, multiplying the first K-1 elements by the second element, extracted currently and broadcast to the vector processing unit, of the convolution kernel matrix B in a one-to-one correspondence manner, and accumulating results; S4, judging whether the calculation of the row of the elements is finished or not; and S5, enabling data addresses of the two matrixes to point to a next data row, finishing the calculation of a first row of elements of a matrix C, and finishing the calculation of the whole matrix C through circulation. The method has the advantages that the principle is simple, the operation is convenient, the algorithm parallelism can be greatly improved, the calculation efficiency is improved, and the like.

Description

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Claims

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Application Information

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Owner NAT UNIV OF DEFENSE TECH
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