16results about How to "Reduce memory access" patented technology

The invention discloses an accelerator for accelerating the reasoning process of an unstructured sparse large language model and an operation method of the accelerator. The accelerator comprises a processor module, a direct memory access module, a memory controller module, a DDR memory module, an interconnection bus module, a calculation core module and a router module. The interconnection bus module is connected with the direct memory access module, the memory controller module and the computing core module; the processor module is connected with the direct memory access module; the DDR memory module is connected with the memory controller module; the router module is connected with the computing core module and the adjacent router module; and the calculation core module obtains to-be-calculated data from the off-chip DDR memory module through the interconnection bus module. According to the method, the limit that data reuse is carried out only along a single row or a single column on a traditional systolic array is broken through, cross-row and cross-column data reuse is achieved, the pressure of hardware equipment is relieved, the positions of non-zero elements are coded through bit masks, and the calculation efficiency is improved.

The invention discloses an automatic code vectorization optimization method and device and a medium, belongs to the technical field of high-performance computing, and aims at solving the problems that existing automatic code vectorization is inconvenient, the manual operation proportion is large, vectorization of irregular codes or codes with a load dependency relationship is difficult to support, and the vectorization efficiency is high. And improvement of calculation performance and reduction of energy consumption are not facilitated. The method comprises the steps of obtaining a scalar instruction diagram of a calculation task according to a calculation kernel of parallel calculation; performing protocol conversion processing on the scalar instruction diagram to obtain a protocol instruction diagram; according to the high-level organization structure of the instruction, grouping processing related to mapping vectors is carried out on the protocol instruction graph, and a grouping graph is obtained; based on the limited vector length of hardware, performing splitting matching processing on instruction vectors in the grouping graph to obtain a vector matching grouping graph; and executing configuration on each group of elements in the vector matching grouping graph to obtain a vector operation graph.

The invention belongs to the technical field of wood defect detection, and particularly relates to a wood surface defect detection method based on improved YOLOv81, electronic equipment and a storage medium. The method comprises the following steps of: improving the Backbone of the traditional YOLOv81 by using Faster Net, and reducing the parameter quantity and the calculation quantity by using the design of partial convolution PConv in the Faster Net; an enhanced weighted bidirectional feature pyramid network EFPN is provided, information exchange between different feature layers is enhanced through an auxiliary branch, and an expansion re-parameter module DRM is designed to fully capture features on different scales. The improved YOLOv81 is more suitable for detecting the multi-scale defects on the surface of the wood, the detection precision is improved, the parameter quantity and the calculated quantity are smaller, and an efficient and accurate solution is provided for detecting the defects on the surface of the wood.

The invention discloses a global nerve drawing method and system based on a programmable rasterization engine, and belongs to the technical field of computer graphics, and the method comprises the steps: at the programmable rasterization engine, analyzing a rasterization descriptor according to a rasterization instruction, and extracting vector microoperation and control parameters; maintaining a task state machine according to the parameters and distributing a control signal, selecting an execution entry from a vector kernel table according to the control signal, and instantiating an operation into a parallel vector thread; in a vector thread execution process, tracking data dependence of a vector register and a synchronization state of a direct memory access unit, executing vector loading / storage operation so as to carry data between the register and an on-chip shared memory according to the data dependence and the synchronization state, and dynamically scheduling vector micro-operation to an execution component so as to complete rasterization calculation; and outputting a result to the neural rendering network to complete global neural rendering. According to the method, the multi-representation neural rendering load can be uniformly and efficiently supported on the AI accelerator, the memory access overhead is remarkably reduced, and the calculation efficiency is improved.

The invention discloses a distributed street lamp control method and system for urban street lamps, and relates to the field of Internet of Things. The method is applied to a central server, and comprises the following steps: when a load value of a first agent node reaches a threshold value, obtaining an assistance request sent by the first agent node; based on the assistance request, evaluating the computing power resource demand quantity of the first agent node; querying load information of a plurality of idle agent nodes; according to the load information of the plurality of idle agent nodes and the computing power resource demand quantity of the first agent node, service information of the first agent node is sent to the plurality of idle agent nodes for processing, and a plurality of processing results are obtained; and returning the plurality of processing results to the first agent node, so that the first agent node controls the operation states of the plurality of city street lamps according to the plurality of processing results. By implementing the technical scheme provided by the invention, the overload problem caused by excessive data volume of the urban street lamp agent node is solved.

The invention provides a multi-dimensional self-adaptive large model inference engine method and system, and relates to the technical field of artificial intelligence, and the method comprises the steps: collecting hardware identification information of calculation hardware, and calling a hardware fingerprint database for matching to generate a hardware type result and a hardware characteristic parameter; constructing a hardware abstraction layer, loading a hardware abstraction driving plug-in according to a hardware type result, and virtualizing computing hardware into a unified logic computing power unit through a hardware abstraction interface; when a large model reasoning task is triggered, dynamically routing to a back-end executor according to a hardware type result by querying a back-end registry; on the basis of hardware characteristic parameters and a hardware abstract interface, a hardware compiling tool chain is called through a rear-end executor, graph optimization and operator fusion are executed on a large model calculation graph, and therefore self-adaptive deployment and efficient reasoning of a large model on heterogeneous hardware can be achieved; the problems that in the prior art, heterogeneous hardware is insufficient in compatibility, configuration is tedious and rigid, and compilation optimization barriers and performance losses are caused during model cross-platform migration are solved.

The present disclosure discloses a computing device, a method for performing convolution operation by using the computing device, and related products. The computing device can be included in a combined processing device, which can further include an interface device and other processing devices. The computing device interacts with the other processing devices to jointly complete a user-specified computing operation. The combined processing device can further include a storage device connected to the computing device and the other processing devices respectively, for storing data of the computing device and the other processing devices. The scheme of the present disclosure optimizes the convolution operation and improves the operation processing efficiency.

The application provides an AI device and an electronic equipment based on sparsity, the AI device comprises a first storage module for storing parameters of a large model, a second storage module for storing intermediate data, and a calculation module, the calculation module comprises a neural network accelerator (NPU) based on in-memory calculation, the neural network accelerator (NPU) comprises an in-memory calculation matrix, the in-memory calculation matrix is used for neural network calculation according to input data and data from the first storage module and the second storage module; the calculation module is further used for predicting neuron parameters to be activated in the parameters of the large model in the first storage module according to the input data and a sparsity prediction model, the calculation module reads the predicted neuron parameters to be activated from the first storage module according to the prediction result, and the calculation module performs neural network calculation according to the read neuron parameters and the input data. The AI device provided by the application can better solve the problems of computing power, energy efficiency, heat dissipation, storage capacity and bandwidth.

The invention discloses a post-quantum digital signature key generation method based on AVX2 acceleration and matrix multiplication optimization, which comprises the following contents: on the basis of original coding, parallel optimization of signature compression and decompression processes is realized by using an AVX2 instruction set, the coding and decoding efficiency is remarkably improved, and the method is particularly suitable for a large-scale data processing scene. A matrix multiplication optimization method for an algorithm is provided, and recursion operation is avoided by only performing matrix partitioning once. And in combination with a register optimization technology, the memory access is effectively reduced while the calculation accuracy is ensured, and the calculation efficiency in the signature generation process is remarkably improved. A register optimization strategy is introduced in matrix multiplication and addition operation, and a calculation result is stored in a register as much as possible by reducing memory access operation, so that the number of times of writing back to a memory is reduced, the execution efficiency of matrix operation is further improved, and the method has important significance on efficient implementation of a post-quantum digital signature scheme.

The invention provides a corn early leaf recognition method, device and equipment and a storage medium, and belongs to the technical field of image recognition, and the method comprises the steps: integrating a FasterNet module in a C2F module of a backbone network of a YOLOv8 model, the FasterNet module comprising a partial convolution module, integrating an LSKNet network in a neck network, constructing an improved YOLOv8 model, and through a historical image data set comprising corn early leaves, carrying out the recognition of the corn early leaves. Training the improved YOLOv8 model to obtain a target detection network; and identifying the early leaf of the corn through the target detection network. According to the method, the Faster Net module is integrated in the C2F module of the backbone network of the YOLOv8 model, the LSKNet network is integrated in the neck network, and the backbone network and the neck network of the original YOLOv8 model are improved to identify the early corn leaves, so that the accuracy of identifying the early corn leaves is improved.

A traffic tracking and detection system for drones. It belongs to the field of target tracking technology, and specifically to the field of lightweight target detection and tracking technology for intelligent transportation and drones. The system includes a target detection module, a target motion trajectory matching module, and a target motion trajectory output module; the target detection module processes the video frame image to obtain the detection frame corresponding to the tracked target and the confidence score corresponding to each detection frame; the target motion trajectory matching module divides the detection frame according to the confidence score, and matches the detection frame with the predicted trajectory after division; the target motion trajectory output module outputs the predicted trajectory as a confirmed trajectory after the same frame detection frame is successfully matched with the predicted trajectory for three consecutive times in the target motion trajectory matching module. It solves the problem of low tracking accuracy caused by the existence of small-sized targets, complex backgrounds, and occlusion in the previous drone tracking of targets.

This application provides a GPU-based sparse matrix-vector multiplication optimization method and apparatus for large-scale computing. The method includes rearranging and reorganizing the sparse matrix to make the distribution of non-zero elements in adjacent columns of the rearranged sparse matrix more similar; dividing the non-zero elements in each row of the sorted sparse matrix into several slices, placing the slices into containers that satisfy constraints, namely, the starting column index of the newly added slice is consecutive to the column indices of other existing slices; each container corresponds to a synchronous execution unit, and several synchronous threads perform the multiplication and accumulation of non-zero elements with the corresponding components of the input vector. Thus, matrix rearrangement makes it more likely that a synchronous execution unit will process data from the same row; by dividing non-zero elements with the same row index and consecutive column indices into slices and placing them into containers, the continuity of data processed by the synchronous execution unit in the column direction reduces non-merged memory accesses and enhances data reuse capabilities.

The invention discloses a low-delay streaming voice wake-up method and device for an embedded terminal, is applied to the technical field of data processing, and adopts a GRU as a backbone architecture for the requirements of low power consumption and high real-time performance of voice wake-up of the embedded terminal. The original audio is segmented and reconstructed through time domain lightweight preprocessing, and the FFT overhead is eliminated through linear layer mapping; building a multi-layer GRU full-causal streaming coding network, wherein no sliding window cache exists, and the memory bandwidth occupies O (1); outputting Token probability distribution containing Blank through a CTCLoss training module, and directionally extracting a target Token probability; constructing a target index sequence based on the target wake-up word and a CTC protocol, and setting three types of state transition rules to generate anti-interference decoding information; and a non-Top-K pruning decoding mechanism is adopted, an attenuation factor and threshold judgment is combined, a judgment result with constant calculation complexity and low false and missing wakeup is generated, and subsequent interaction is triggered if the judgment result succeeds.

The application provides a point cloud data processing method, system and device based on spatial serialization, the method comprising: sorting point cloud data by using a six-way standard sequence sorting method to obtain point cloud data sequences; dynamically and automatically selecting focal point blocks in the sequenced data according to a view cone and screen projection error, and dynamically adjusting the LOD level of each focal point block to obtain sequenced LOD data; after the sequenced LOD data is managed by VIBO block management, performing triangle optimization reconstruction; using a UV space remapping algorithm, performing patch and texture alignment processing on the point cloud surface after triangle optimization reconstruction, and performing multi-format texture packing to complete rendering output. The application reduces unnecessary calculation and memory access through dynamic adjustment of the LOD of the focal point block and VIBO block caching. Through dynamic LOD adjustment and optimized triangle reconstruction technology, combined with efficient texture packing and decompression, the rendering frame rate can be significantly improved while details are maintained.

The present invention discloses a method for identifying and counting multiphase flow bubbles based on improved YOLOv8, comprising the following steps: obtaining a multiphase flow bubble image data set; dividing the multiphase flow bubble image data set into a training set and a verification set; improving YOLOv8 to obtain an improved YOLOv8 network model, and adding a counting module in the improved YOLOv8 network model to obtain a multiphase flow bubble identification and counting model based on improved YOLOv8; training through the training set to obtain an optimal bubble identification and counting model; performing performance evaluation on the optimal bubble identification and counting model through the verification set, and when the performance evaluation passes, identifying and counting multiphase flow bubbles through the optimal bubble identification and counting model. The present invention can achieve a bubble detection effect with high calculation accuracy and high speed while greatly reducing the amount of model parameters and the amount of calculation, and is more convenient for equipment deployment and application.

The present disclosure discloses a computing device, a method for performing convolution operation by using the computing device, and related products. The computing device can be included in a combined processing device, which can further include an interface device and other processing devices. The computing device interacts with the other processing devices to jointly complete a user-specified computing operation. The combined processing device can further include a storage device connected to the computing device and the other processing devices respectively, for storing data of the computing device and the other processing devices. The scheme of the present disclosure optimizes the convolution operation and improves the operation processing efficiency.