System-on-chip verification method and verification system

Abstract

The embodiment of the present invention discloses a system-on-chip verification method and verification system. Executable file templates are pre-generated. During the process of running the executable file templates, incentive information of different test cases is obtained through data interaction functions. Executable file templates are configured to generate executable files corresponding to different test cases. The data interaction and control instruction interaction between the system on chip and the verification platform are realized through the data interaction function and the process synchronization function. In this way, during the process of verifying the SoC, the change of the application scene can only be modified on the verification platform, and the verification platform sends the incentive information and control instructions after the scene change to the SoC, and the SoC receives the information sent by the verification platform. After stimulating the information, it is enough to directly configure and generate the corresponding executable file, so that it is not necessary to recompile and generate the executable file every time the test case is changed, which improves the verification efficiency of the system on chip.

Description

technical field [0001] The present invention relates to the technical field of chip design, and more specifically, relates to a system-on-chip verification method and a verification system. Background technique [0002] With the increase of chip integration, the test cases and application scenarios for System on Chip (SOC) verification are becoming more and more complex. Changes require the program code to be updated, and the compiler compiles the updated program code to generate a new executable file (that is, a dat file). less efficient. Contents of the invention [0003] The purpose of the present invention is to provide a system-on-chip verification method and a verification system to improve the verification efficiency of the system-on-chip. [0004] To achieve the above object, the present invention provides the following technical solutions: [0005] A system-on-chip verification method comprising: [0006] The system-on-chip runs the executable file template, a...

AI Technical Summary

Problems solved by technology

[0002] With the increase of chip integration, the test cases and application scenarios for System on Chip (SOC) verification are becoming more and more complex. Changes require the program code to be updated, and the compiler compiles the updated program code to generate a new executable file (that is, a dat file). less efficient

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