Inrush current prevention circuit

Abstract

Provided is an inrush current prevention circuit capable of reliably suppressing inrush current during power-on regardless of a rated input voltage range by using a comparatively simple circuit configuration. An inrush current prevention circuit is configured such that: inrush current flowing when a power supply voltage is applied to a power supply input terminal 1 is suppressed by a current limit resistor 2; and when an output voltage to a load 4 exceeds a bypass threshold value, a bypass switching element 5 connected in parallel with the current limit resistor 2 is turned on and thereby the current flowing through the current limit resistor 2 is bypassed. The inrush current prevention circuit is provided with a bypass threshold value setting means 16 in which the voltage value at a dividing point is set as a bypass threshold value, said dividing point being given by resistors 9, 10 for dividing the power supply voltage in accordance with an output voltage. The bypass threshold value setting means 16 is constituted by resistors 9, 10, 12, 13, a comparator 14, a reference power supply 15, and a switching element 11.

Description

technical field [0001] The present invention relates to a surge current prevention circuit that suppresses a surge current that flows when an electronic circuit is powered on. Background technique [0002] When power is applied to an electronic circuit containing a capacitor, a very large current, inrush current, transiently flows to charge the capacitor. When excessive inrush current flows, there is a concern that not only damage to capacitors and loads, but also serious damage to the power supply will be caused. [0003] Therefore, a surge current prevention circuit is known that suppresses surge current by inserting a high-resistance element such as a current limiting resistor into the circuit when the power is turned on, and uses a low-resistance bypass element after the surge current converges. The high-resistance element is bypassed, thereby suppressing wasteful power consumption due to the high-resistance element. [0004] In the above-mentioned surge current preven...

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Problems solved by technology

[0012] In addition, in Figure 4 In the circuit, it is necessary to uniquely set the charging threshold based on the reference power supply 112 according to the lower limit side of the rated input voltage range, so there is a problem that the FET 103 cannot be sufficiently suppressed from Inrush current when OFF state changes to ON state

[0014] However, for example, when the rated input voltage range is 5 [V] to 15 [V], the charging threshold must be set to about 4.5 [V]. Therefore, when the input voltage is the maximum rated voltage of 15 [V], When the charging resistor 104 is bypassed from the off state to the on state of the FET 103, the drain-source voltage of the FET 103 is 10.5 [V], and an excessive surge current flows through the FET 103. The problem

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