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Memory test method and device, storage medium and test terminal

A test method and test device technology, applied in static memory, instruments, etc., can solve the problems of increasing the complexity of test and verification programs, affecting test reliability, and long test time, so as to improve test reliability, improve test efficiency, The effect of saving test time

Active Publication Date: 2020-09-01
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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Problems solved by technology

[0004] Since after the test terminal sends the test vectors to the memory, it takes a long time to load the configuration information into the memory, and its order of magnitude can be similar to the time required to execute the corresponding test items on the memory. Therefore, frequent switching of test vectors makes The test time is too long; it is easy to make mistakes during the switching process of the test vector, which affects the reliability of the test; in addition, frequent switching of the test vector also increases the complexity of the test and verification procedures

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  • Memory test method and device, storage medium and test terminal
  • Memory test method and device, storage medium and test terminal
  • Memory test method and device, storage medium and test terminal

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Embodiment Construction

[0024] As described in the background art section, the memory testing method in the prior art requires frequent switching of test vectors for the main array and the redundant array, which makes the test time too long, reduces the test efficiency, is prone to errors in the test process, and affects the reliability of the test. , while also increasing the complexity of testing and verification procedures.

[0025] An embodiment of the present invention provides a method for testing a memory. First, by controlling the memory, the address of the redundant array is mapped to an unoccupied address in the address space of the main array, and the main array and the redundant array are accessed as a whole, Then in the address space of the main array, the test vector is sent to the memory, so that the main array and the redundant array execute the test items in the test vector, and the test vector does not need to be switched during the test process, which can effectively Improve the te...

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Abstract

The invention relates to a method and device for testing a memory, a storage medium and a testing terminal. The memory comprises a main array and a redundant array. The method for testing the memory comprises the following steps: controlling the controller to map an address of the redundant array to an address which is not occupied in an address space of the main array; and sending a testing vector to the storage in the address space of the main array so as to drive the main array and the redundant array to execute test items in the testing vector. By utilizing the technical scheme, the testing efficiency and reliability of the memory can be effectively improved.

Description

technical field [0001] The invention relates to the field of memory testing, in particular to a memory testing method and device, a storage medium and a testing terminal. Background technique [0002] As the capacity of memory becomes larger and larger, it is difficult to ensure that every storage bit in the memory is valid during production. Therefore, in the memory, a redundancy array (Redundancy Array) other than the main array (Main Array) is generally provided in the memory. ). When a failure occurs in the main array, the redundant array can be used to repair (ie, replace) the failed storage bits of the main array for higher product yield. Therefore, the redundant array is required to have the same reliability as the main array. Each test item for the primary array during testing should cover the redundant array. [0003] At present, except for a few non-automatic tests, in most cases, the test terminal is used to send test vectors (TestVectors) to the memory to perf...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C29/56
CPCG11C29/56
Inventor 张若成钱亮杨光军
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP