Back-etching planarization method for photoresist

Abstract

The invention provides a back-etching planarization method for a photoresist. The back-etching planarization method for the photoresist comprises the following steps: forming a dielectric layer on the surface of a silicon wafer with a circuit structure; performing primary roasting treatment on the silicon wafer; in a natural cooling process of the silicon wafer, coating the surface of the silicon wafer with the photoresist, wherein the photoresist covers the dielectric layer; performing secondary roasting treatment on the silicon wafer after the photoresist is coated; and back-etching the photoresist and the dielectric layer to planarize the surface of the silicon wafer. The method provided by the invention can prevent from excessively etching or even damaging other film layers in the planarized etching process of the photoresist, so that the planarizing degree of photoresist back-etching is effectively guaranteed.

Description

【Technical Field】 [0001] The present invention relates to the technical field of semiconductor chip manufacturing, in particular, to a photoresist etch-back planarization method. 【Background technique】 [0002] In the manufacturing process of semiconductor chips, photoresist etch-back planarization is an important process technology, which mainly uses photoresist coated on the dielectric layer to etch it to achieve planarization of the dielectric Layer purpose. However, in the above process, if there are small gaps on the surface of the dielectric layer, the air in the small gaps will easily expand during the photoresist coating and baking process, which will cause a bubble to form on the surface of the small gap. Due to the existence of bubbles, the thickness of the photoresist here will be very small, so the photoresist is easy to be etched, which in turn causes the dielectric layer in the area where the bubbles are located to be easily over-etched, and can even damage the die...

AI Technical Summary

Problems solved by technology

However, in the above process, if there are small gaps on the surface of the dielectric layer, the air in the small gaps tends to expand during the photoresist coating and baking process, which will cause a bubble to form on the surface of the small gaps.

Due to the presence of bubbles, the thickness of the photoresist here will be very small, so the photoresist is easily etched through, and the dielectric layer in the area where the bubbles are located is easily over-etched, and even the dielectric can be damaged. other layers below the layer, resulting in poor planarization

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