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Shift register, driving method thereof, driving control circuit and display device

A shift register and control electrode technology, applied in static memory, digital memory information, instruments, etc., can solve the problems of increased process difficulty, increased production cost, complicated connection structure, etc., so as to reduce production cost and simplify preparation. Craftsmanship to achieve the effect of narrow bezel design

Active Publication Date: 2017-12-08
BOE TECH GRP CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

At present, although the output of the gate scanning signal can be realized by inputting more control signals with different functions, this leads to a large number of switching transistors forming shift registers of various levels in the gate driving circuit, and each switching transistor The specific structure of the connection between them is also relatively complicated, which increases the difficulty of the process and increases the production cost. It is even necessary to use more signal lines to input various control signals with different functions into the shift registers at all levels, resulting in the opening of the display panel. rate is reduced, making this display panel uncompetitive

Method used

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  • Shift register, driving method thereof, driving control circuit and display device
  • Shift register, driving method thereof, driving control circuit and display device
  • Shift register, driving method thereof, driving control circuit and display device

Examples

Experimental program
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Effect test

Embodiment 1

[0107] by Figure 2a The structure of the shift register shown is taken as an example to describe its working process; the signal of the first reference signal terminal Vref1 is a high potential signal, and the signal of the second reference signal terminal Vref2 is a low potential signal; the corresponding input and output timing diagram Such as Figure 3a Shown, specifically, select as Figure 3a The four stages of T1, T2, T3 and T4 in the shown input and output timing diagram.

[0108] In the T1 stage, Input=1, CK1=0, CK2=1.

[0109] Since CK1=0, both the first switch transistor M1 and the second switch transistor M2 are turned on. Among them, the turned-on first switch transistor M1 provides the high-potential signal of the input signal terminal Input to the first node A, so that the signal of the first node A is a high-potential signal, so the third switch transistor M3 and the fourth switch transistor M4 And the seventh switching transistor M7 is turned off. The tur...

Embodiment 2

[0124] by Figure 2a The structure of the shift register shown is described as an example to describe its specific working process. An insertion stage T01 is inserted between the T1 stage and the T2 stage in the timing diagram of the first embodiment, that is, on the basis of the first embodiment, the input The duration of the effective pulse signal at the signal terminal Input is extended by one clock cycle, and the corresponding input and output timing diagram is as follows Figure 3b shown. exist Figure 3b In the timing diagram shown, five stages T1, T01, T2, T3, and T4 are selected, wherein the inserting stage T01 is further divided into a first inserting sub-stage T011 and a second inserting sub-stage T012.

[0125] In the T1 stage, Input=1, CK1=0, CK2=1; and thereafter, Input=1, CK1=1, CK2=1. The specific working process of this stage is basically the same as that of the T1 stage in Embodiment 1, and will not be described in detail here.

[0126] In the T011 phase o...

Embodiment 3

[0139] by Figure 2a The structure of the shift register shown is taken as an example to describe its specific working process. Two insertion stages T01 and T02 are inserted between the T1 stage and the T2 stage in the timing diagram of the first embodiment, that is, on the basis of the first embodiment The duration of the effective pulse signal at the input signal terminal Input is extended by two clock cycles, and the corresponding input and output timing diagram is as follows Figure 3c shown. exist Figure 3c In the timing diagram shown, six stages T1, T01, T02, T2, T3, and T4 are selected, among which, the insertion stage T01 is further divided into the first insertion sub-stage T011 and the second insertion sub-stage T012; the insertion stage T02 is further divided into It is the first insertion sub-phase T021 and the second insertion sub-phase T022.

[0140] In the T1 stage, Input=1, CK1=0, CK2=1; and thereafter, Input=1, CK1=1, CK2=1. The specific working process o...

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Abstract

The invention discloses a shift register, a driving method thereof, a driving control circuit and a display device. The shift register includes an input module, a first control module, a second control module, a third control module, a node stabilization module, a first output module, and a second output module. In virtue of the cooperation of the seven modules, an output signal end can output a shifted signal stably through a simple structure and a few signal lines, thereby simplifying a preparation process and reducing production cost. Moreover, in virtue of the cooperation of the seven modules, the time length of a valid pulse signal output from the signal output end can be controlled just by changing the time length of a valid pulse signal at an input signal end without the need to change a circuit and a process, thereby simplifying the preparation process, reducing production cost, and contributing to the narrow bezel design of a panel in a display device.

Description

technical field [0001] The invention relates to the field of display technology, in particular to a shift register, a driving method thereof, a driving control circuit and a display device. Background technique [0002] With the rapid development of display technology, the display panel is more and more developed towards the direction of high integration and low cost. Among them, the gate driver on array (Gate Driver on Array, GOA) technology integrates a thin film transistor (Thin Film Transistor, TFT) gate switch drive control circuit on the array substrate of the display panel to form a gate driver for the TFT in the display panel. Control, so that the bonding (Bonding) area of ​​the gate integrated circuit (Integrated Circuit, IC) and the wiring space of the fan-out (Fan-out) area can be saved, which can not only reduce the product cost in terms of material cost and manufacturing process, Moreover, the display panel can achieve an aesthetic design with symmetrical sides...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G09G3/36G09G3/3266G11C19/28
CPCG09G3/3266G09G3/3677G11C19/28G09G2310/0286G09G3/3225G09G2300/0426G09G2310/08
Inventor 羊振中
Owner BOE TECH GRP CO LTD
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