Solid-state storage device and state prediction method thereof

Abstract

The invention discloses a solid-state storage device and a state prediction method thereof. The solid-state storage device comprises a nonvolatile memory and a controller, wherein the nonvolatile memory comprises a first block; the controller is connected to the nonvolatile memory and comprises an equation storage circuit; multiple prediction equations are stored in the equation storage circuit; and the controller performs matching on a first prediction equation among the prediction equations according to multiple state parameters corresponding to the first block, and the first prediction equation is used for predicting a reading voltage deviation of the first block.

Description

technical field [0001] The present invention relates to a solid state storage device and its control method, and in particular to a solid state storage device and its state prediction method. Background technique [0002] As we all know, solid state storage device (solid state device) has been widely used in various electronic products, such as SD card, solid state hard disk and so on. Generally speaking, a solid-state storage device is composed of a controller and a non-volatile memory. [0003] Please refer to figure 1 , which is a schematic diagram of a solid-state storage device. The solid-state storage device 10 is connected to a host 14 via an external bus 12, wherein the external bus 12 can be a USB bus, a SATA bus, a PCIe bus, and the like. Furthermore, the solid-state storage device 10 includes a controller 101 and a non-volatile memory 105 . Wherein, the controller 101 is connected to the non-volatile memory 105 via an internal bus 107, and is used to store the...

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Problems solved by technology

Obviously, in the process of decoding process B, the controller 101 can only provide the retry reading voltage group to the non-volatile memory 105 according to the order of the retry table 106, and it cannot directly obtain suitable retry reading voltage set, so the controller 101 will spend a considerable amount of time providing an unsuitable retry read voltage set to the non-volatile memory 105

[0025] Similarly, when the solid-state storage device 10 enters the decoding process C of reading and retrying, the above-mentioned situation will also occur, causing the error correction process of the entire solid-state storage device 10 to take a long time, making the reading of the solid-state storage device 10 The speed (read speed) dropped significantly

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