Thin film transistor and preparation method thereof, array substrate and display device

Abstract

The invention discloses a thin film transistor and its preparation method, an array substrate and a display device. The thin film transistor comprises: a source electrode, a drain electrode, an active layer and a gate electrode located on the substrate substrate, wherein the source electrode and the drain electrode The source and the active layer are arranged in the same layer. The source and the active layer are adjacent two-layer structures in the thin film transistor. Both the source and the drain are connected to the active layer. The electrode is located on the side of the gate insulating layer facing away from the substrate, the orthographic projections of the gate, source, and drain on the active layer do not overlap, and the side of the active layer facing away from the substrate is not covered by the gate, source The area covered by the electrode and drain is conductorized. The technical solution of the invention can effectively avoid the generation of parasitic capacitance while reducing the size of the thin film transistor.

Description

technical field [0001] The invention relates to the field of display technology, in particular to a thin film transistor, a preparation method thereof, an array substrate and a display device. Background technique [0002] figure 1 It is a structural schematic diagram of a thin film transistor in the prior art, such as figure 1 As shown, the thin-film transistor is a bottom-gate thin-film transistor, that is, the gate 1 is located below the active layer 3. In order to form a conductive channel connecting the source 4 and the drain 5 in the active layer 3, the The size of the grid 1 is made as large as possible. However, at this time, a part of the gate 1 is directly facing a part of the source 4 (and the drain 5 ), so that a parasitic capacitance is generated in the facing region A, thereby affecting the operating characteristics of the thin film transistor. [0003] In order to solve the problem of parasitic capacitance, a top-gate thin film transistor is provided in the...

AI Technical Summary

Problems solved by technology

Since the via hole 7 needs to occupy a certain volume, the size of the entire thin film transistor will be larger, which is not conducive to the miniaturization of the thin film transistor and the realization of high resolution of the display panel.

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