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Method for controlling chip set and device connected to host

A control method and chipset technology, applied in the direction of instruments, electrical digital data processing, etc., can solve the problems of long time consumption

Active Publication Date: 2020-06-30
VIA ALLIANCE SEMICON CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

It may take longer to wake up the USB device up to 20ms

Method used

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  • Method for controlling chip set and device connected to host
  • Method for controlling chip set and device connected to host
  • Method for controlling chip set and device connected to host

Examples

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Embodiment Construction

[0016] Various embodiments of the invention will now be set forth with reference to the following description of the invention. The following description introduces the basic concept of the present invention and is not intended to limit the content of the present invention. The actual scope of the invention shall be defined according to the scope of the patent application.

[0017] figure 1 It illustrates a universal serial bus (USB) interface design implemented according to an embodiment of the present application, wherein link power management (LPM) can indeed be implemented on the universal serial bus (USB) device. This example discusses the USB2.0 specification. Of course, the present invention is not limited thereto, and the idea of ​​the present invention can also be applied to other bus interfaces or other specifications of the USB interface.

[0018] The physical layer interface of the host side controlling the USB device 100 involves two USB protocols: UTMI protoco...

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Abstract

The chipset that actually implements the control of the connected device includes a link core, a protocol conversion logic and a link wrapper. The link core cooperates with a first protocol of a connection interface. The connection wrapper implements conversion of the first protocol to a second protocol of the connection interface. The protocol conversion logic is coupled between the link core and the link wrapper, stuffs a specific tag provided by the link core into a data load and then forwards it to the link wrapper, so that a physical link coupled to the link wrapper The layer chip correctly provides the specific tag to a device coupled to the connection interface by sending the data payload to the device.

Description

technical field [0001] This application is about link layer design of chipset Background technique [0002] The low power consumption technology of the Universal Serial Bus 2.0 (USB 2.0) specification not only provides suspend / resume functions, but also includes Link Power Management (LPM for short). [0003] Regarding the standby / wake-up function, the device or root port enters standby according to idle time. For example, if there is no transmission (including SOF transmission) on the Universal Serial Bus (USB) for 3ms, the USB device enters standby. It may take up to 20ms to wake up the USB device. [0004] The link power management LPM is realized by control transfer between the host and the USB device. The host and the USB device exchange information (for example, LPM (extended) transaction) in a controlled manner, so that the USB device quickly enters the low power state L1 (low power state L1 ), or makes the USB device quickly exit the low power state L1. It only t...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F13/42G06F13/40
Inventor 惠志强马红超
Owner VIA ALLIANCE SEMICON CO LTD