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A parallel data reading and writing system and its writing and reading methods shared by multiple memories among multiple controllers

A multi-memory, multi-controller technology, applied in the direction of machine execution devices, concurrent instruction execution, etc., can solve the problems of high hardware cost, large hardware area, and large power consumption

Active Publication Date: 2020-08-21
FUZHOU ROCKCHIP SEMICON
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] To this end, it is necessary to provide a technical solution for multi-controller multi-memory shared parallel data reading and writing, which is used to solve the problem of large hardware area and difficult Problems such as high cost and high power consumption

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  • A parallel data reading and writing system and its writing and reading methods shared by multiple memories among multiple controllers
  • A parallel data reading and writing system and its writing and reading methods shared by multiple memories among multiple controllers
  • A parallel data reading and writing system and its writing and reading methods shared by multiple memories among multiple controllers

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Embodiment Construction

[0056] In order to explain in detail the technical content, structural features, achieved goals and effects of the technical solution, the following will be described in detail in conjunction with specific embodiments and accompanying drawings.

[0057] see figure 1, is a schematic diagram of a multi-controller multi-memory sharing parallel data reading and writing system related to a specific embodiment of the present invention. The system includes a plurality of processor cluster units. Each "processor cluster unit" includes one or more digital signal processors (Digital Signal Processor, DSP for short). Each processor cluster unit is directly connected to a "first arbitration unit" and a "second arbitration unit". All the first arbitration units, all the second arbitration units, and the connections between them form an "external data arbitration network", which is used to transmit data and operation requests between processor cluster units. In this external data arbitra...

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Abstract

The invention provides a read-write system for parallel data shared by multiple memories among multiple controllers and a writing and reading method of the read-write system. According to the system and the method, when a processing unit of a certain processor cluster unit initiates read-write access to another processor cluster unit, through three-level arbitration management of a first arbitration unit of an internal processor cluster unit, a second arbitration unit of an external processor cluster unit and a third arbitration unit, only a data operation request meeting a preset condition isselected to perform data operation. In this way, read-write access to different storage units can be performed at the same time, mutual non-conflict can be guaranteed, therefore, data read-write access efficiency is greatly improved, and the system and the method have broad market prospects in the integrated circuit field.

Description

technical field [0001] The invention relates to the field of integrated circuits, in particular to a multi-controller and multi-memory sharing parallel data reading and writing system and writing and reading methods thereof. Background technique [0002] With the development of science and technology and the progress of society, integrated circuit design has been widely used, and more and more electronic devices have entered people's daily life, which not only brings convenience to people's daily life, but also further promotes the development of science and technology. Innovation and R&D. In the field of integrated circuit design, data reading and writing is one of the important items. [0003] Processors often have ultra-high computing power and can perform fast calculations on data in a short period of time. In order to maximize the computing power of the internal computing unit of the processor, RAM coupled to it is usually configured as an internal memory to improve d...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/38
Inventor 罗宁
Owner FUZHOU ROCKCHIP SEMICON